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Use the google search bar on side panel. It searches through all previous GATE/other questions. For hardcopy of previous year questions please see
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Recent questions tagged madeeasytestseries2019
0
votes
1
answer
1
MadeEasy Test Series 2019: Algorithms  Spanning Tree
Consider a simple undirected weighted graph G(V, E) with 10 vertices and 45 edge, assume (u, v) are two vertices weight of a edge is =4lu vl then the minimum cost of the spanning tree of G_ 36
asked
Jan 30
in
Algorithms
by
Ram Swaroop
Active
(
2.6k
points)

113
views
algorithms
spanningtree
madeeasytestseries2019
madeeasytestseries
0
votes
1
answer
2
MadeEasy Test Series 2019: CO & Architecture Cache Memory
Consider a nway cache with 'x blocks of 64 words each. The main memory of the system is having 8 million words. Size of the tag field is 16 bits and additional memory required for tags is 1024 bytes. What will be the values of n and x respectively? Answer 256 512
asked
Jan 30
in
CO & Architecture
by
Ram Swaroop
Active
(
2.6k
points)

121
views
coandarchitecture
cachememory
madeeasytestseries2019
madeeasytestseries
0
votes
1
answer
3
Made Easy Subject Test 2019: Computer Networks  Lan Technologies
100 stations on a pure Aloha network share a 1 MBPS channel. if frames are 1000 bits long, find the throughput if each station is sending 10 frames per second
asked
Jan 30
in
Computer Networks
by
Jaggi
(
103
points)

104
views
computernetworks
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
4
MadeEasy Full Length Test 2019: Programming & DS  Programming
Consider the following C code: #include <stdio.h> struct MadeEasy { char p,q,r; }; int main (void) { struct MadeEasy a={ d'  2019,'e',5+'a'}; struct MadeEasy *b=&a; printf("%c, %c", *((char*)b+1) 1, *((char*)b+ 2) 1); return 0; } The output of the following code will be
asked
Jan 29
in
Programming
by
Ram Swaroop
Active
(
2.6k
points)

96
views
programminginc
programming
madeeasytestseries2019
madeeasytestseries
0
votes
1
answer
5
MadeEasy Test Series 2019: CO & Architecture  Cache Memory
A CPU cache is organized into 2 level cache L1 and L2 The penalty for L1 cache miss and L2 cache miss are 60 and 30 respectively for 1200 memory references The hit time of L1 and L2 are 5 and 10 clock cycles and penalty for L2 cache miss to main memory is 70 clock cycles. The average memory access time will be
asked
Jan 29
in
CO & Architecture
by
Ram Swaroop
Active
(
2.6k
points)

101
views
coandarchitecture
cachememory
madeeasytestseries2019
madeeasytestseries
0
votes
1
answer
6
MadeEasy CBT Test 2019: Digital Logic  Boolean Algebra
asked
Jan 29
in
Digital Logic
by
singh chetan
(
39
points)

116
views
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
7
MadeEasy CBT Test 2019: Databases  Natural Join
asked
Jan 28
in
Databases
by
singh chetan
(
39
points)

89
views
databases
naturaljoin
madeeasytestseries2019
madeeasytestseries
cbt2019
0
votes
0
answers
8
MadeEasy Full Length Test 2019: Computer Networks  Sliding Window
A 1 Mbps satellite link connects two ground stations. The altitude of the satellite is 6000 km and speed of the signal is 3 10^8 m/s. What should be the packet size for a channel utilization of 50% ... packets are negligible in size and that there are no errors during communication. 81031 Bytes 83101 Bytes 801301 Bytes 81301 Bytes
asked
Jan 28
in
Computer Networks
by
Badayayash
Active
(
1k
points)

73
views
slidingwindow
computernetworks
madeeasytestseries2019
madeeasytestseries
+1
vote
3
answers
9
MadeEasy Subject Test 2019: Combinatory  Permutations And Combinations
Q.The number of ways, we can arrange 5 books in 3 shelves ________.
asked
Jan 28
in
Combinatory
by
Badayayash
Active
(
1k
points)

347
views
discretemathematics
permutationsandcombinations
madeeasytestseries2019
madeeasytestseries
+1
vote
0
answers
10
MadeEasy Subject Test 2019: Programming & DS  programming in C
void foo(int n) { for(i1=1;i1<=n;i1++) { for(i2=1;i2<=i1;i2++) { ....... { for(i6=1;i6<=i5;i6++) { count++; } } } } } Count initially 0.What is value returned by foo(8)?
asked
Jan 28
in
Programming
by
srestha
Veteran
(
111k
points)

117
views
programminginc
programming
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
11
MadeEasy Full Length Test 2019: Digital Logic  Boolean Expressions
The maximum number of Boolean expressions that can be formed for the function f(x,y,z) satisfying the relation f(x’,y,z’) = f(x,y,z) is.
asked
Jan 28
in
Digital Logic
by
Badayayash
Active
(
1k
points)

68
views
booleanexpressions
digitallogic
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
12
MadeEasy Full Length Test 2019: CO & Architecture  Cache Memory
Consider a 2 way set associative cache with 4 blocks. The memory block requests in the order. 4,6,3,8,5,6,0,15,6,17,20,15,0,8 If LRU is used for block replacement then memory set 17 will be in the cache block ____. (PS: the given answer is 1)
asked
Jan 28
in
CO & Architecture
by
snaily16
(
263
points)

70
views
coandarchitecture
cachememory
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
13
MadeEasy Full Length Test 2019: Theory of Computation  Finite Automata
Let L = {w w ∈ {0,1}*; w contains 01 and 011 as substring}. The number of states in the minimal DFA corresponding to the complement of L is equal to My Answer: Correct if I am wrong. Its complement will be all ... don't have 01 as substring. so if we make its dfa then minimum number of states will be 3. Answer given is 4
asked
Jan 28
in
Theory of Computation
by
Mayank Bansal
(
83
points)

74
views
finiteautomata
theoryofcomputation
madeeasytestseries2019
madeeasytestseries
+1
vote
0
answers
14
MadeEasy Full Length Test 2019: Programming & DS  DS
Q.Consider a 2 dimensional array A[40 ... 95, 40 ... 95] in lower triangular matrix representation. If the array is implemented in the memory in the form of row major order and base address of the array is 1000, then the address of A[66][50] will be ________.
asked
Jan 27
in
Programming
by
Badayayash
Active
(
1k
points)

81
views
datastructure
arrays
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
15
MadeEasy Subject Test 2019: Digital Logic  Digital Counter
Consider the circuit given below. Assume initially flipflops are in reset state. What will be the mod of above digital circuit?
asked
Jan 27
in
Digital Logic
by
snaily16
(
263
points)

62
views
digitallogic
digitalcounter
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
16
MadeEasy Test Series 2019: Programming & DS  Hashing
Consider the hashing table with 'm' slots and 'n' keys. If the expected number of probes in unsuccessful search is 3. The expected number of probes in a successful search is_ Answer 1.647
asked
Jan 27
in
DS
by
Ram Swaroop
Active
(
2.6k
points)

122
views
programminginc
datastructure
hashing
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
17
MadeEasy Full Length Test 2019: Databases  Er Diagram
Find minimum number of tables needed? Answer : (3) Can anyone please explain the answer and how to approach such complex er diagrams?
asked
Jan 26
in
Databases
by
vk_9_1_9
(
133
points)

81
views
databases
erdiagram
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
18
MadeEasy Full Length Test 2019: Digital Logic  Logic Gates
asked
Jan 26
in
Digital Logic
by
screddy1313
(
477
points)

52
views
digitallogic
logicgates
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
19
MadeEasy Subject Test 2019: Digital Logic  Number Systems
Even after seeing the solution I was unable to understand this question: Can any one tell whats happening here:
asked
Jan 26
in
Digital Logic
by
Nandkishor3939
Active
(
1.2k
points)

68
views
numbersystem
digitallogic
madeeasytestseries2019
madeeasytestseries
0
votes
1
answer
20
MadeEasy Test Series 2019: Thoery of Computation  Regular Languages
Is the following language regular or not?
asked
Jan 25
in
Theory of Computation
by
Anu Sreenivasan Unni
(
89
points)

91
views
theoryofcomputation
regularlanguages
madeeasytestseries2019
madeeasytestseries
0
votes
2
answers
21
MadeEasy Test Series 2019: Operating System  Virtual Memory
Consider the system which has the virtual address of 36 bits and physical address of 30 bits and page size of 8 kb, page table entry contains 1 valid bit, 2 protection bit and 1 reference bit. Then the approximate page table size in ... nearest bytes, or sometimes we consider it as bits also. If yes, then in what case we take it as bits.
asked
Jan 25
in
Operating System
by
CSHuB
(
57
points)

63
views
operatingsystem
virtualmemory
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
22
MadeEasy Full Length Test 2019: CO & Architecture  Cache Memory
All is fine but how did they calculate the miss rate of level 2 cache (L2) i.e.how is m2=0.46875?
asked
Jan 24
in
CO & Architecture
by
Iamniks4
(
63
points)

51
views
cachememory
coandarchitecture
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
23
MadeEasy Test Series: Databases  Transactions
how to check S2 and S4 ?
asked
Jan 24
in
Databases
by
jatin khachane 1
Loyal
(
7.1k
points)

93
views
databases
transactions
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
24
Made Easy Test Series 2019: Set theory & Algebra  Groups
set of all possible diagonal matrix of order n ans given monoid my doubtwhy it cannot have inverse??
asked
Jan 24
in
Set Theory & Algebra
by
priyanka manwani
(
455
points)

54
views
discretemathematics
settheory&algebra
groups
madeeasytestseries2019
madeeasytestseries
+1
vote
0
answers
25
MadeEasy Full Length Test 2019: Computer Networks  Network Flow
Consider a source computer (S) transmitting a file of size $2 * 10^6$ bits to a destination computer (D) over a network of three routers ($R_1$, $R_2$ and $R_3$) and four links $(L_1, L_2, L_3 and L_4)$. $L_1$ connects $S$ ... and propagation delays in transmitting the file from $S$ to $D$? a. 1007 ms b. 1010 ms c. 2010 ms d 2007 ms
asked
Jan 24
in
Computer Networks
by
CSHuB
(
57
points)

55
views
computernetworks
networkflow
madeeasytestseries2019
madeeasytestseries
0
votes
1
answer
26
MadeEasy Full Length Test 2019: CO & Architecture  Speedup
asked
Jan 23
in
CO & Architecture
by
jatin khachane 1
Loyal
(
7.1k
points)

68
views
coandarchitecture
speedup
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
27
MadeEasy Full Length Test 2019: Databases  Transactions
Consider the following schedule: S: r2(A), w1(B), w1(C), r3(B), r2(B), r1(A), C1, r2(C), C2, w3(A), C3 Which of the following are true? A) S is conflict serializabile B) S is allowed by 2PL C) S is strict recoverable D) S is allowed by strict 2PL
asked
Jan 23
in
Databases
by
JAYKISHAN
(
99
points)

31
views
databases
transactionandconcurrency
madeeasytestseries2019
madeeasytestseries
0
votes
0
answers
28
MadeEasy Full Length Test 2019: Digital Logic  Number Representation
The (r  1)'s complement of a number can be found using formula (r^n  r^(m ) N) where r is base of the number N having n digits and m digits in integral an fraction part respectively. We have been given ... 819 (iv) 517.67 How many (r  1)'s complement of above decimal numbers can be calculated using mentioned formula?
asked
Jan 23
in
Digital Logic
by
Shankar Kakde
(
373
points)

31
views
digitallogic
numberrepresentation
madeeasytestseries
madeeasytestseries2019
0
votes
0
answers
29
MadeEasy Subject Test 2019: Operating System  Threads
asked
Jan 23
in
Operating System
by
Anurag Parothia 1
Junior
(
509
points)

55
views
operatingsystem
threads
madeeasytestseries2019
madeeasytestseries
0
votes
1
answer
30
MadeEasy Full Length Test 2019: Combinatory  Permutations And Combinations
The number of ways 5 letter be put in 3 letter boxes A,B,C. If letter box A must contain at least 2 letters.
asked
Jan 22
in
Combinatory
by
snaily16
(
263
points)

150
views
discretemathematics
permutationsandcombinations
madeeasytestseries2019
madeeasytestseries
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