Recent questions tagged memory-management

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1

multilevel paging

asked 1 day ago in Operating System by Rahul_Rathod_ (403 points) | 29 views

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2

Made easy test series # Memory management

asked 5 days ago in Operating System by naveen bhatt (473 points) | 28 views

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OS Paging
Consider a paging scheme, in which average process size is 32MB and each page table entry size is 4B. The optimal size of page to minimize the total overload due to page table and internal fragmentation is _______KB.

asked Dec 6 in Operating System by balraj_allam (71 points) | 54 views

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4

GA Testseries

asked Dec 6 in CO & Architecture by aditi19 Active (2.1k points) | 38 views

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5

Bit Map
A bit-map can be used to keep track of which blocks are free in a file-system’s partition on disk. Assuming, 1 KB block size and a disk size of 40 GB, what is the size of the bit map?

asked Nov 27 in CO & Architecture by Shivangi Parashar 2 (301 points) | 51 views

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6

threads
there is no protection between the threads of same process why ?

asked Nov 8 in Operating System by Gurdeep Saini Active (5.2k points) | 78 views

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7

sudo gate test series
A computer system has TLB access time = 30 ns and the main memory access time is 150 ns and if the miss rate is 20 % the calculate the effective memory access time if 3 level of paging is applied. i am getting 270 ns

asked Nov 5 in Operating System by Gurdeep Saini Active (5.2k points) | 70 views

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8

Runtime Environment Heap Allocation
Does Heap Allocation support both recursion and dynamic memory allocation? Because,a stack can be implemented using dynamic memory allocation.Please correct me. Test Series answer shows only dynamic memory allocation

asked Nov 3 in Compiler Design by sripo Junior (933 points) | 72 views

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9

Internal and External fragmentation
Consider $6$ memory partitions of sizes $200$ $\text{KB}$, $400$ $\text{KB}$, $600$ $\text{KB}$, $500$ $\text{KB}$, $300$ $\text{KB}$and $250$ $\text{KB}$, where $\text{KB}$refers to $\text{kilobyte}$. ... be calculated when we have the information about free memory slots and the process size whose size must be greater than Max free slot size. Someone verify it.

asked Oct 31 in Operating System by Shubhanshu Boss (17k points) | 133 views

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10

Made easy
Option (a) Best fit (b) Next fit (c) First fit

asked Oct 29 in Operating System by Vegeta Junior (583 points) | 38 views

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11

Multilevel paging
Consider a machine with byte addressable memory 32 bits virtual addresses, 32 bits physical addresses and 4 KB page size. If a two-level page table system is used where each page table occupies one page and page table entries of 4 B each. How to calculate the size of 1st level page table & 2nd level page table(s) ? Also how to calculate memory overhead?

asked Oct 22 in Operating System by Lovejeet Singh (29 points) | 168 views

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12

doubt

asked Oct 18 in Operating System by Vegeta Junior (583 points) | 37 views

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13

Paging - Memory management
Why do we need multilevel paging? According to me the reason is that page table needs contiguous memory allocation.So if page table size is too large, we may not be able to store the table in contiguous memory. So is this the reason behind multilevel paging? Also when we page the page table, do we store all levels page table in memory or only the outer level page table?

asked Oct 17 in Operating System by Lovejeet Singh (29 points) | 59 views

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14

AceBook
Consider the machine with 64 MB Physical Memory and a 34 bit Virtual Address Space. If the page size is 4KB, the appropriate sizes of conventional and inverted page table sizes are: a) 4M, 4K b)4K, 4M c)4M, 16K d)16K, 4M. soln: is Option C. but my ans is (7MB, 28KB)

asked Oct 16 in Operating System by abhishek1995_cse (159 points) | 60 views

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15

Operating System: pagging: PTE

asked Oct 12 in Operating System by chauhansunil20th Active (1.9k points) | 38 views

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16

Acebook
For a page size of 200 words, what is the page number and offset for a logical address of 1142. a)5,142 b)2,142 c)6,142 d)7,140

asked Oct 12 in Operating System by abhishek1995_cse (159 points) | 22 views

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17

AN INTRODUCTION TO OPERATING SYSTEMS CONCEPTS AND PRACTICE (GNU/LINUX)

asked Oct 9 in Operating System by superak96 (83 points) | 33 views

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18

Process Management
Q.Consider the processes P1, P2, P3, P4 whose arrival times are 0, 1, 2, 3 and Burst times are 5, 2, 13, 7. If the Context Switching time is 1 unit (ms), what is the average waiting time if Shortest Job Next scheduling algorithm is used? (a) 7.5 (b) 6.25 (c) 6.5 (d) None

asked Oct 5 in Operating System by abhishek1995_cse (159 points) | 49 views

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19

Memory Management
Dynamically Linked Libraries imply more page faults than static? Why?

asked Oct 3 in Operating System by manisha11 Active (1.3k points) | 35 views

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20

GATE Operating Systems Memory Allocation

asked Oct 1 in Operating System by Nidhi Budhraja (203 points) | 25 views

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21

Virtual Memory

asked Sep 29 in Operating System by Na462 Loyal (7.5k points) | 65 views

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22

Multi-level paging doubt
Consider a computer system using 2-level paging with TLB. The logical address supported is 32 bits. The page table is divided into 512 pages each of size 1KB. Page table entry size at 1st level is 2Bytes and that at the second level is 4 Bytes each. ... level PT)+$512*1KB$(At second level)=$544KB$ Is my analysis correct? Below is the visualisation what I see is happening.

asked Sep 28 in Operating System by Ayush Upadhyaya Boss (18.9k points) | 98 views

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23

Multilevel Paging

asked Sep 15 in Operating System by Vishnathan (343 points) | 154 views

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24

Virtual address space
A one-to-one mapping of the entire physical address space to a process's virtual address space is a correct address translation solution. True/False. Explain.

asked Sep 13 in Operating System by Debashish Deka Veteran (57.6k points) | 44 views

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1 answer

25

Page Table
A page table based translation will always consume less memory to store translation meta-data, than a seg-mentation based solution. True/False. Explain.

asked Sep 13 in Operating System by Debashish Deka Veteran (57.6k points) | 38 views

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26

Memory Management : paging
Consider a system using 2 level paging applicable page table is devided into 2k pages each size 4kB. If PAS is 64 MB which is devided into 16K frames . PTE size is 2B in both the levels calculate the length of PA, LA and # of entry at second level?

asked Sep 11 in Operating System by Aks9639 (77 points) | 81 views

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27

Operating System Multilevel Paging
In a 32-bit machine we subdivide the virtual address into 4 segments as follows: 10-bi 8-bit 6-bit 8 bit We use a 3-level page table, such that the first 10-bit are for the first level and so on. Page Table Entry Size is 2B 10-bit 8- ... page size which is 2^8 so outer most page cannot fit in one page table But outermost page table should fit in one page ?? ref:

asked Sep 6 in Operating System by jatin khachane 1 Active (3.3k points) | 88 views

+1 vote

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28

William stalling :Memory Management
Suppose : TLB lookup time = 20 ns TLB HIT ratio = 80% Memory access time = 75 ns Swap page time = 500000 ns 50% pages are dirty and os uses a single level page table a) what is EMAT if we assume page fault 0%? b) what is EMAT if page fault 10% ? In both cases assume cost to update TLB , page table , frame table is negligible (if needed).

asked Sep 6 in Operating System by Aks9639 (77 points) | 50 views

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29

Galvin operating system
CPU generates logical address and that logical address is converted to physical address. What does this means exactly ?? Assume run time binding is used. When process P1 is loaded in memory lets say at 10k Lets say OS scheduler schedules P1,so CPU ... generates address means we put that address in MAR to get some data/instruction from memory right ? Please help me in this

asked Aug 27 in Operating System by jatin khachane 1 Active (3.3k points) | 35 views

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30

#OS Dynamic linking and Dynamic Libraries?

asked Aug 25 in Operating System by iarnav Loyal (9.3k points) | 31 views

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