Recent questions tagged memory-management / GATE Overflow for GATE CSE

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211

Galvin Edition 9 Exercise 8 Question 11 (Page No. 391)
Given six memory partitions of $300$ $KB$, $600$ $KB$, $350$ $KB$, $200$ $KB$, $750$ KB$ and $125$KB$ (in order), how would the $first-fit$, $best-fit$, and $worst-fit$ algorithms place processes of size $115$ $KB$, $500$ $KB$, $358$KB$, $200$ $KB$, and $375$ $KB$ (in order) ? Rank the algorithms in terms of how efficiently they use memory.

Given six memory partitions of $300$ $KB$, $600$ $KB$, $350$ $KB$, $200$ $KB$, $750$$ KB$ and $125$$KB$ (in order), how would the $first-fit$, $best-fit$, and $worst-fit...

akash.dinkar12

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akash.dinkar12 asked Mar 21, 2019

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0 answers

212

Galvin Edition 9 Exercise 8 Question 10 (Page No. 391)
Consider the following process for generating binaries. A compiler is used to generate the object code for individual modules, and a linkage editor is used to combine multiple object modules into a single program binary. How does ... passed from the compiler to the linkage editor to facilitate the memory-binding tasks of the linkage editor ?

Consider the following process for generating binaries. A compiler is used to generate the object code for individual modules, and a linkage editor is used to combine mul...

akash.dinkar12

883 views

akash.dinkar12 asked Mar 21, 2019

0 votes

0 answers

213

Galvin Edition 9 Exercise 8 Question 9 (Page No. 391)
Explain the difference between internal and external fragmentation.

Explain the difference between internal and external fragmentation.

akash.dinkar12

148 views

akash.dinkar12 asked Mar 21, 2019

0 votes

0 answers

214

Galvin Edition 9 Exercise 8 Question 8 (Page No. 390-391)
In the IBM/370, memory protection is provided through the use of keys. A key is a 4-bit quantity. Each 2-K block of memory has a key (the storage key) associated with it. The CPU also has a key (the ... Multiprogramming with a fixed number of processes $d$. Multiprogramming with a variable number of processes $e$. Paging $f$.Segmentation

In the IBM/370, memory protection is provided through the use of keys. A key is a 4-bit quantity. Each 2-K block of memory has a key (the storage key) associated with it....

akash.dinkar12

321 views

akash.dinkar12 asked Mar 21, 2019

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0 answers

215

Galvin Edition 9 Exercise 8 Question 7 (Page No. 390)
Sharing segments among processes without requiring that they have the same segment number is possible in a dynamically linked segmentation system. a. Define a system that allows static linking and sharing of segments without requiring that ... a paging scheme that allows pages to be shared without requiring that the page numbers be the same.

Sharing segments among processes without requiring that they have the same segment number is possible in a dynamically linked segmentation system.a. Define a system that ...

akash.dinkar12

506 views

akash.dinkar12 asked Mar 21, 2019

0 votes

0 answers

216

Galvin Edition 9 Exercise 8 Question 6 (Page No. 390)
Describe a mechanism by which one segment could belong to the address space of two different processes.

Describe a mechanism by which one segment could belong to the address space of two different processes.

akash.dinkar12

369 views

akash.dinkar12 asked Mar 21, 2019

1 votes

0 answers

217

Galvin Edition 9 Exercise 8 Question 5 (Page No. 390)
What is the effect of allowing two entries in a page table to point to the same page frame in memory? Explain how this effect could be used to decrease the amount of time needed to copy a large amount of memory from one place to another. What effect would updating some byte on the one page have on the other page ?

What is the effect of allowing two entries in a page table to point to the same page frame in memory? Explain how this effect could be used to decrease the amount of time...

akash.dinkar12

345 views

akash.dinkar12 asked Mar 21, 2019

1 votes

1 answer

218

Galvin Edition 9 Exercise 8 Question 4 (Page No. 390)
Consider a logical address space of $64$ pages of $1,024$ words each, mapped onto a physical memory of $32$ frames. $a$. How many bits are there in the logical address ? $b$. How many bits are there in the physical address ?

Consider a logical address space of $64$ pages of $1,024$ words each, mapped onto a physical memory of $32$ frames.$a$. How many bits are there in the logical address ?$b...

akash.dinkar12

323 views

akash.dinkar12 asked Mar 21, 2019

0 votes

2 answers

219

Galvin Edition 9 Exercise 8 Question 3 (Page No. 390)
Why are page sizes always powers of 2 ?

Why are page sizes always powers of 2 ?

akash.dinkar12

260 views

akash.dinkar12 asked Mar 21, 2019

0 votes

0 answers

220

Galvin Edition 9 Exercise 8 Question 2 (Page No. 390)
Consider a system in which a program can be separated into two parts: code and data. The $CPU$ knows whether it wants an instruction (instruction fetch) or data (data fetch or store). Therefore, two base-limit ... automatically read-only, so programs can be shared among different users. Discuss the advantages and disadvantages of this scheme.

Consider a system in which a program can be separated into two parts: code and data. The $CPU$ knows whether it wants an instruction (instruction fetch) or data (data fet...

akash.dinkar12

219 views

akash.dinkar12 asked Mar 21, 2019

0 votes

0 answers

221

Galvin Edition 9 Exercise 8 Question 1 (Page No. 390)
Name two differences between logical and physical addresses.

Name two differences between logical and physical addresses.

akash.dinkar12

159 views

akash.dinkar12 asked Mar 21, 2019

0 votes

1 answer

222

Virtual Memory
The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined by Instruction Set Architecture page size physical memory size number of processes in memory Why the answer for the above question is “ISA” ?? Please explain the concept behind it

The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined byInstruction Set Architecturepage sizephysica...

s_dr_13

477 views

s_dr_13 asked Mar 8, 2019

2 votes

1 answer

223

MadeEasy Subject Test 2019: Operating System - Memory Management
Please explain it with solution or concept.

Please explain it with solution or concept.

Naveen Muralidhar

660 views

Naveen Muralidhar asked Jan 20, 2019

1 votes

2 answers

224

Applied Course | Mock GATE | Test 1 | Question: 49
How much memory is used for page tables, when there are $10$ process running in the system with the below details? Virtual Address space: $1GB$ Page size: $1KB$ Each page table entry contains a valid bit, dirty bit and the resulting frame number. And the system has a maximum of $2^{14}$ physical pages. $10$ MB $20$ MB $30$ MB None of these

How much memory is used for page tables, when there are $10$ process running in the system with the below details?Virtual Address space: $1GB$Page size: $1KB$Each page ta...

Applied Course

746 views

Applied Course asked Jan 16, 2019

2 votes

0 answers

225

Ace Test Series: Operating System - Virtual Memory

amitqy

808 views

amitqy asked Jan 12, 2019

2 votes

1 answer

226

Paging and virtual memory
If there is 2 or more level paging for processes, is it possible to have more than 1 page fault while accessing any single addressable unit(byte or word) ?

If there is 2 or more level paging for processes, is it possible to have more than 1 page fault while accessing any single addressable unit(byte or word) ?

3lurryface

1.1k views

3lurryface asked Jan 9, 2019

0 votes

0 answers

227

UPPCL AE 2018:61
Consider a computer system with $32-$ bit virtual addressing and page size of sixty-four kilobytes. The computer system has one-level page table per process with each page table entry of $6$ bytes. If the maximum physical memory size supported by this paging system is ... how many bits can be used for flags and permissions within a page table entry? $6$ None of the above $7$ $5$

Consider a computer system with $32-$ bit virtual addressing and page size of sixty-four kilobytes. The computer system has one-level page table per process with each pag...

admin

300 views

admin asked Jan 5, 2019

0 votes

0 answers

228

UPPCL AE 2018:57
Consider the following $\text{C}$ function executed in an $\text{OS}$ with paging where the page size is $4$ kilobytes. Further, assume that the system employs a $32-$ entry direct mapped $\text{TLB}$ int *alloc_and_init() { int counter, value = 0, size = 2048; int ... of the program, what is the number of $\text{TLB}$ misses during the execution of the for loop? $2048$ $2$ $0$ $1$

Consider the following $\text{C}$ function executed in an $\text{OS}$ with paging where the page size is $4$ kilobytes. Further, assume that the system employs a $32-$ en...

admin

276 views

admin asked Jan 5, 2019

0 votes

1 answer

229

UPPCL AE 2018:21
Assume a memory access to main memory on a cache “miss” takes $30 \; \text{ns}$ and a memory access to the cache (on a cache “hit”) takes $3 \; \text{ns}.$ If $80 \%$ of the processor’s memory requests result in a cache “hit”, what is the average memory access time? $8.4 \text{ns}$ $9 \text{ns}$ $4.4 \text{ns}$ $2.2 \text{ns}$

Assume a memory access to main memory on a cache “miss” takes $30 \; \text{ns}$ and a memory access to the cache (on a cache “hit”) takes $3 \; \text{ns}.$ If $80...

admin

577 views

admin asked Jan 5, 2019

0 votes

1 answer

230

Relation between physical address, logical address and relocation register
Physical address is (A) The logical address added by the value in re-locatable registers (B) Re location register – logical address (C) Re location address + relocation register (D) None of these

Physical address is(A) The logical address added by the value in re-locatable registers(B) Re location register – logical address(C) Re location address + relocation re...

Raj Singh 1

5.0k views

Raj Singh 1 asked Jan 3, 2019

4 votes

1 answer

231

GATE Overflow | Mock GATE | Test 1 | Question: 18
Assume a program has just referenced an address in virtual memory. Which of the following scenario cannot occur? TLB miss with no page fault TLB hit and page replacement TLB miss and page fault TLB hit with no page fault

Assume a program has just referenced an address in virtual memory. Which of the following scenario cannot occur?TLB miss with no page faultTLB hit and page replacementTLB...

Ruturaj Mohanty

1.3k views

Ruturaj Mohanty asked Dec 27, 2018

2 votes

2 answers

232

GATE Overflow | Mock GATE | Test 1 | Question: 19
A computer system consists of infinitely large primary memory storage capacity. In other words the physical address space exceeds the logical address space significantly in all cases. In such situation which of the following ... cannot be used in such situation Virtual memory concept can be used to give multiprogramming capability to system

A computer system consists of infinitely large primary memory storage capacity. In other words the physical address space exceeds the logical address space significantly ...

Ruturaj Mohanty

1.5k views

Ruturaj Mohanty asked Dec 27, 2018

8 votes

1 answer

233

GATE Overflow | Mock GATE | Test 1 | Question: 38
Consider a system with paging-based memory management, whose architecture allows for a $4\text{GB}$ virtual address space for processes. The size of logical pages and physical frames is $4\text{KB}$. The system has $8\text{GB}$ physical RAM. The system allows a maximum of ... $4 \text{GB} + 4 \text{KB}$ $4 \text{MB} + 4 \text{GB}$

Consider a system with paging-based memory management, whose architecture allows for a $4\text{GB}$ virtual address space for processes. The size of logical pages and phy...

Ruturaj Mohanty

2.5k views

Ruturaj Mohanty asked Dec 27, 2018

0 votes

3 answers

234

MadeEasy Test Series: Operating System - Memory Management

Ramij

955 views

Ramij asked Dec 26, 2018

1 votes

0 answers

235

MadeEasy Test Series: Operating System - Memory Management
Consider five memory partitions of size $100 \text{ KB }, 500 \text{ KB }, 200 \text{ KB }, 450 \text{ KB and } 600 \text{ KB }$ ... Both next fit and best fit results in same None of the above Answer given by ME: Option $(B)$ My answer: Option $(D)$

Consider five memory partitions of size $100 \text{ KB }, 500 \text{ KB }, 200 \text{ KB }, 450 \text{ KB and } 600 \text{ KB }$ in same order. If sequence of requests fo...

zeeshanmohnavi

780 views

zeeshanmohnavi asked Dec 25, 2018

0 votes

0 answers

236

Multi-level paging-doubt
Consider a system which has 2 level paging.The page table is divided into 2K pages and each page is having 4K entries.Memory is word addressable and Physical address space is 64MW which is divided into 16K frames.Page table entry size is 2 words. (A)Length ... with result what I am getting. Is question poor or I am poor at multi-level paging?(Please tell where I went wrong)

Consider a system which has 2 level paging.The page table is divided into 2K pages and each page is having 4K entries.Memory is word addressable and Physical address spac...

Ayush Upadhyaya

1.9k views

Ayush Upadhyaya asked Dec 24, 2018

0 votes

1 answer

237

madeeasy OS 2019- Memory overhead multilevel paging
for memory overhead in Multi level paging, for innermost table only 1 page size shall be counted na? and NOT the complete page table size? please explain the concept, thanks!

for memory overhead in Multi level paging, for innermost table only 1 page size shall be counted na? and NOT the complete page table size?please explain the concept, than...

Markzuck

1.4k views

Markzuck asked Dec 22, 2018

0 votes

1 answer

238

multilevel paging

Rahul_Rathod_

735 views

Rahul_Rathod_ asked Dec 15, 2018

0 votes

1 answer

239

NIELIT 2018-38
Find the effective access time for the memory for the given data. Page fault service time $=8$ ms Average memory access time $=20$ ns One page fault is generated for every memory access $=10^6$ $29$ ns $33$ ns $28$ ns $30$ ns

Find the effective access time for the memory for the given data.Page fault service time $=8$ msAverage memory access time $=20$ nsOne page fault is generated for every m...

Arjun

2.1k views

Arjun asked Dec 7, 2018

2 votes

2 answers

240

MadeEasy Test Series: Operating System - Memory Management
Consider a paging scheme, in which average process size is 32MB and each page table entry size is 4B. The optimal size of page to minimize the total overload due to page table and internal fragmentation is _______KB.

Consider a paging scheme, in which average process size is 32MB and each page table entry size is 4B. The optimal size of page to minimize the total overload due to page ...

balraj_allam

1.7k views

balraj_allam asked Dec 6, 2018

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