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Recent questions tagged microprocessors
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31
GATE CSE 1988 | Question: 1v
If a crystal of 4MHz frequency has been connected to an 8085, the instruction-fetch duration of a 10-states instruction is ______
If a crystal of 4MHz frequency has been connected to an 8085, the instruction-fetch duration of a 10-states instruction is ______
go_editor
411
views
go_editor
asked
Dec 10, 2016
Others
gate1988
microprocessors
non-gate
+
–
2
votes
1
answer
32
GATE CSE 1988 | Question: 1iv
If the total number of states in the fetching and execution phases of an $8085$ instruction is known to be $7,$ number of states in these machine cycles is divided as ________
If the total number of states in the fetching and execution phases of an $8085$ instruction is known to be $7,$ number of states in these machine cycles is divided as ___...
go_editor
787
views
go_editor
asked
Dec 10, 2016
Others
gate1988
8085-microprocessor
microprocessors
numerical-answers
out-of-gate-syllabus
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–
0
votes
0
answers
33
GATE CSE 1989 | Question: 7
An 8085-based microcomputer consisting of 16 kbytes of ROM, 16kbytes of RAM and four 8-bit I/O ports is to be designed using RAM and ROM chips each of 2 kbytes capacity. The chip to be used for I/O ports realization consists of two 8-bit ports ... memory address space. The I/O locations are to occupy lower order I/O address space. Give memory map and I/O address map.
An 8085-based microcomputer consisting of 16 kbytes of ROM, 16kbytes of RAM and four 8-bit I/O ports is to be designed using RAM and ROM chips each of 2 kbytes capacity. ...
makhdoom ghaya
515
views
makhdoom ghaya
asked
Dec 1, 2016
CO and Architecture
gate1989
descriptive
microprocessors
out-of-gate-syllabus
+
–
1
votes
1
answer
34
Virtual Gate Test Series: CO & Architecture - 8085 Microprocessor
Consider the following instructions of an 8085 microprocessor MVI D, 6 EH MVI E, 5 DH MOV A, D ADD E If above sequence of instructions are executed, then the value of carry flag (CY) and auxiliary carry (AC) flag respectively will be CY = 0, AC = 0 CY = 0, AC = 1 CY = 1, AC = 1 CY = 1, AC = 0
Consider the following instructions of an 8085 microprocessorMVI D, 6 EHMVI E, 5 DHMOV A, DADD EIf above sequence of instructions are executed, then the value of carry fl...
Hradesh patel
1.1k
views
Hradesh patel
asked
Nov 26, 2016
CO and Architecture
co-and-architecture
microprocessors
virtual-gate-test-series
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–
0
votes
1
answer
35
Virtual Gate Test Series: CO & Architecture - 8085 Microprocessor Instruction
Consider the following set of instructions executed by 8085 microprocessor MOV H,20 MOV L,10 MOV E,00 XCHG After the execution, the contents of E register will be ______________ (integer value only).
Consider the following set of instructions executed by 8085 microprocessorMOV H,20MOV L,10MOV E,00XCHGAfter the execution, the contents of E register will be ____________...
Hradesh patel
735
views
Hradesh patel
asked
Nov 26, 2016
CO and Architecture
co-and-architecture
microprocessors
virtual-gate-test-series
+
–
1
votes
1
answer
36
UGC NET CSE | August 2016 | Part 3 | Question: 4
Which of the following in 8085 microprocessor performs $HL = HL + HL$ ? DAD D DAD H DAD B DAD SP
Which of the following in 8085 microprocessor performs $HL = HL + HL$ ?DAD DDAD HDAD BDAD SP
makhdoom ghaya
624
views
makhdoom ghaya
asked
Sep 30, 2016
CO and Architecture
ugcnetcse-aug2016-paper3
co-and-architecture
microprocessors
8085-microprocessor
+
–
1
votes
0
answers
37
UGC NET CSE | August 2016 | Part 3 | Question: 2
$8085$ microprocessor has ____ bit ALU. $32$ $16$ $8$ $4$
$8085$ microprocessor has ____ bit ALU.$32$$16$$8$$4$
makhdoom ghaya
859
views
makhdoom ghaya
asked
Sep 30, 2016
CO and Architecture
ugcnetcse-aug2016-paper3
co-and-architecture
microprocessors
8085-microprocessor
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–
0
votes
1
answer
38
UGC NET CSE | June 2011 | Part 2 | Question: 34
In which way(s) a macroprocessor for assembly language can be implemented? Independent two-pass processor Independent one-pass processor Expand macrocalls and substitute arguments All of the above
In which way(s) a macroprocessor for assembly language can be implemented?Independent two-pass processorIndependent one-pass processorExpand macrocalls and substitute arg...
makhdoom ghaya
1.0k
views
makhdoom ghaya
asked
Aug 30, 2016
Others
ugcnetcse-june2011-paper2
co-and-architecture
microprocessors
assembly
+
–
3
votes
1
answer
39
UGC NET CSE | December 2015 | Part 3 | Question: 3
Which of the following $8085$ microprocessor hardware interrupt has the lowest priority? RST $6.5$ RST $7.5$ TRAP INTR
Which of the following $8085$ microprocessor hardware interrupt has the lowest priority?RST $6.5$RST $7.5$TRAPINTR
go_editor
6.0k
views
go_editor
asked
Aug 9, 2016
Unknown Category
ugcnetcse-dec2015-paper3
microprocessors
8085-microprocessor
+
–
1
votes
1
answer
40
Microprocessor UGCNET
A computer with $32$ bit wide data bus user $4k \times 8$ static RAM memory chips. The smallest memory this computer can have is...? $32$kb $16$kb $8$KB $24$kb
A computer with $32$ bit wide data bus user $4k \times 8$ static RAM memory chips. The smallest memory this computer can have is...?$32$kb$16$kb$8$KB$24$kb
vamsib111
1.7k
views
vamsib111
asked
Jul 31, 2016
CO and Architecture
co-and-architecture
microprocessors
+
–
1
votes
1
answer
41
UGC NET CSE | June 2014 | Part 3 | Question: 45
One of the main features that distinguish microprocessor from micro-computers is Words are usually larger in microprocessors. Words are shorter in microprocessors. Microprocessor does not contain $I/O$ devices. None of the above.
One of the main features that distinguish microprocessor from micro-computers is Words are usually larger in microprocessors. Words are shorter in microprocessors. Microp...
makhdoom ghaya
2.3k
views
makhdoom ghaya
asked
Jul 10, 2016
Others
ugcnetjune2014iii
microprocessors
+
–
6
votes
2
answers
42
ISRO2011-37
Find the memory address of the next instruction executed by the microprocessor $(8086),$ when operated in real mode for $\textsf{CS=1000}$ and $\textsf{IP=E000}$ $\textsf{10E00}$ $\textsf{1E000}$ $\textsf{F000}$ $\textsf{1000E}$
Find the memory address of the next instruction executed by the microprocessor $(8086),$ when operated in real mode for $\textsf{CS=1000}$ and $\textsf{IP=E000}$$\textsf{...
go_editor
7.8k
views
go_editor
asked
Jun 22, 2016
CO and Architecture
isro2011
co-and-architecture
non-gate
8086
microprocessors
+
–
1
votes
2
answers
43
UGC NET CSE | December 2013 | Part 3 | Question: 54
The essential difference between traps and interrupts is traps are asynchronous and interrupts are synchronous with the program. traps are synchronous and interrupts are asynchronous with the program. traps are synchronous and interrupts are asynchronous with the I/O devices. None of these
The essential difference between traps and interrupts istraps are asynchronous and interrupts are synchronous with the program.traps are synchronous and interrupts are as...
Sanjay Sharma
1.9k
views
Sanjay Sharma
asked
May 11, 2016
CO and Architecture
ugcnetcse-dec2013-paper3
microprocessors
+
–
4
votes
3
answers
44
GATE CSE 1998 | Question: 2.10, ISRO2008-17
The address space of $8086$ CPU is one Megabyte $256$ Kilobytes $1 \;\text{K}$ Megabytes $64$ Kilobytes
The address space of $8086$ CPU isone Megabyte$256$ Kilobytes$1 \;\text{K}$ Megabytes$64$ Kilobytes
Kathleen
4.6k
views
Kathleen
asked
Sep 25, 2014
CO and Architecture
gate1998
co-and-architecture
microprocessors
out-of-syllabus-now
isro2008
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