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Recent questions tagged microprogramming
1
votes
2
answers
61
Microprogrammed control unit 1
Ques:- Control field of microinstruction contain two groups of control signal group 1 supports none or one of 64 control signals and group 2 supports at most 6 from remaining. What is size of micro operation? (what is the meaning of "from remaining" here?)
Ques:-Control field of microinstruction contain two groups of control signal group 1 supports none or one of 64 control signals and group 2 supports at most 6 from remain...
khushtak
1.2k
views
khushtak
asked
Jan 6, 2016
CO and Architecture
co-and-architecture
microprogramming
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–
0
votes
1
answer
62
Resource for studying microprogramming
I want to know how much important topic is microprogramming for gate? And what and from where I should prepare for this topic?
I want to know how much important topic is microprogramming for gate? And what and from where I should prepare for this topic?
shikharV
564
views
shikharV
asked
Jan 2, 2016
CO and Architecture
co-and-architecture
horizontal
microprogramming
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–
1
votes
2
answers
63
MadeEasy Test Series: CO & Architecture - MicroProgramming
Q.27 Consider a CPU where 150 instructions take 8 clock cycles each to complete the execution. A horizontal microprogrammed control unit has to generate 125 control signals. What is the minimum size of control word? _______ Answer given is 136 ( ... or byte) , Neither they have given that answer should be multiple of 8 , if it is in bit !
Q.27Consider a CPU where 150 instructions take 8 clock cycles each to complete the execution. A horizontal microprogrammed control unit has to generate 125 control signal...
Akash Kanase
2.2k
views
Akash Kanase
asked
Dec 19, 2015
CO and Architecture
co-and-architecture
microprogramming
made-easy-test-series
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–
1
votes
3
answers
64
microinstruction
Sourabh Kumar 1
1.3k
views
Sourabh Kumar 1
asked
Oct 30, 2015
CO and Architecture
microprogramming
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–
3
votes
3
answers
65
Made easy workbook 2015 (CONTROL UNIT DESIGN)
A micro instruction is to be designed to specify none/one of the three micro operations of one kind and none or upto 6 micro operation of another kind. The minimum number of bits in the micro instruction is - (a) 9 (b) 5 (c) 8 (d) none of these
A micro instruction is to be designed to specify none/one of the three micro operations of one kind and none or upto 6 micro operation of another kind. The minimum number...
khushtak
1.4k
views
khushtak
asked
Oct 8, 2015
CO and Architecture
co-and-architecture
microprogramming
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–
8
votes
1
answer
66
Q 12 (control unit design) MadeEasy workBook
a micro programmed control memory supports 256 instructions .Every instruction on average consume 8 micro operations .The system supports 16 flag conditions and 48 control signals.If the horizontal micro programming is used,what is the size of each control word let 1 address control instruction is used. (a) 61 bits (b) 63 bits (c) 6 bits (d) 8 bits
a micro programmed control memory supports 256 instructions .Every instruction on average consume 8 micro operations .The system supports 16 flag conditions and 48 cont...
khushtak
6.8k
views
khushtak
asked
Oct 7, 2015
CO and Architecture
co-and-architecture
microprogramming
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–
11
votes
1
answer
67
Microprogramming Control Unit
A hypothetical processor supports 256 instructions.Each instruction takes 12 cycles to complete the execution. Processor supports horizontal control unit design. It has 24 control signals and 16 flags. What is the size of microinstruction??
A hypothetical processor supports 256 instructions.Each instruction takes 12 cycles to complete the execution. Processor supports horizontal control unit design. It has 2...
sonu
5.9k
views
sonu
asked
Oct 7, 2015
CO and Architecture
horizontal
microprogramming
co-and-architecture
+
–
3
votes
2
answers
68
Q-13 (ch-2) Made easy workbook 2015
The control field of 1-address control word has to support 2 groups of control signals.In the group-1 it is requires to generate either 1 or none of the 63 control signals.In the group-2 at most 4 from the remaining.What will be the minimum no. bits needed for control field. option (A) 6 option (B) 10 option (c) 67 option (D) 81.
The control field of 1-address control word has to support 2 groups of control signals.In the group-1 it is requires to generate either 1 or none of the 63 control signal...
khushtak
3.2k
views
khushtak
asked
Oct 7, 2015
CO and Architecture
microprogramming
co-and-architecture
+
–
1
votes
2
answers
69
How many and what size of field exits in micro operation field?
If a micro program supports 46 micro operations with parallelism of 2, how many and what size of field exits in micro operation field? How do we get the size of micro-operation field as 9?
If a micro program supports 46 micro operations with parallelism of 2, how many and what size of field exits in micro operation field?How do we get the size of micro-oper...
Tehreem
1.0k
views
Tehreem
asked
Sep 10, 2015
CO and Architecture
co-and-architecture
microprogramming
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–
31
votes
2
answers
70
GATE IT 2005 | Question: 49
An instruction set of a processor has $125$ signals which can be divided into $5$ groups of mutually exclusive signals as follows: Group $1$ $:$ $20$ signals, Group $2$ $:$ $70$ signals, Group $3$ $:$ $2$ signals, Group $4$ ... signals. How many bits of the control words can be saved by using vertical microprogramming over horizontal microprogramming? $0$ $103$ $22$ $55$
An instruction set of a processor has $125$ signals which can be divided into $5$ groups of mutually exclusive signals as follows:Group $1$ $:$ $20$ signals, Group $2$ $:...
Ishrat Jahan
9.2k
views
Ishrat Jahan
asked
Nov 3, 2014
CO and Architecture
gateit-2005
co-and-architecture
microprogramming
normal
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–
24
votes
1
answer
71
GATE IT 2005 | Question: 45
A hardwired CPU uses $10$ control signals $S_1$ to $S_{10}$, in various time steps $T_1$ to $T_5$, to implement $4$ instructions $I_1$ to $I_4$ ... $S_{10} = (I_2 + I_3) \cdot T_2 + I_4 \cdot T_3 + (I_1 + I_3) \cdot T_4 + (I_2 + I_4) \cdot T_5$
A hardwired CPU uses $10$ control signals $S_1$ to $S_{10}$, in various time steps $T_1$ to $T_5$, to implement $4$ instructions $I_1$ to $I_4$ as shown below:$$\begin{ar...
Ishrat Jahan
6.2k
views
Ishrat Jahan
asked
Nov 3, 2014
CO and Architecture
gateit-2005
co-and-architecture
microprogramming
normal
+
–
32
votes
1
answer
72
GATE IT 2004 | Question: 49
A CPU has only three instructions $I1, I2$ and $I3,$ which use the following signals in time steps $T1-T5$: $I1 : T1$ : Ain, Bout, Cin $T2$ : PCout, Bin $T3$ : Zout, Ain $T4$ : Bin, Cout $T5$ : End $I2 : T1$ : Cin, Bout, Din $T2$ : Aout, Bin $T3$ : Zout, Ain $T4$ : Bin, ... $(T1 + T2 ).I1 + (T2 + T4).I3 + T3$ $(T1 + T2 ).I2 + (T1 + T3).I1 + T3$
A CPU has only three instructions $I1, I2$ and $I3,$ which use the following signals in time steps $T1-T5$:$I1 : T1$ : Ain, Bout, Cin $T2$ : PCout, Bin $T...
Ishrat Jahan
8.5k
views
Ishrat Jahan
asked
Nov 2, 2014
CO and Architecture
gateit-2004
co-and-architecture
microprogramming
normal
+
–
47
votes
3
answers
73
GATE IT 2006 | Question: 41
The data path shown in the figure computes the number of $1s$ in the $32-bit$ input word corresponding to an unsigned even integer stored in the shift register. The unsigned counter, initially zero, is incremented if the most significant bit of the shift register is $1.$ The ... $32, 5, 010$ $5, 32, 010$ $5, 31, 011$ $5, 31, 010$
The data path shown in the figure computes the number of $1s$ in the $32-bit$ input word corresponding to an unsigned even integer stored in the shift register.The unsign...
Ishrat Jahan
9.9k
views
Ishrat Jahan
asked
Oct 31, 2014
CO and Architecture
gateit-2006
co-and-architecture
microprogramming
normal
+
–
56
votes
9
answers
74
GATE IT 2008 | Question: 39
Consider a CPU where all the instructions require $7$ clock cycles to complete execution. There are $140$ instructions in the instruction set. It is found that $125$ control signals are needed to be generated by the control unit. While designing the horizontal ... size of the control word and control address register? $125, 7$ $125, 10$ $135, 9$ $135, 10$
Consider a CPU where all the instructions require $7$ clock cycles to complete execution. There are $140$ instructions in the instruction set. It is found that $125$ cont...
Ishrat Jahan
17.6k
views
Ishrat Jahan
asked
Oct 28, 2014
CO and Architecture
gateit-2008
co-and-architecture
microprogramming
normal
+
–
33
votes
6
answers
75
GATE CSE 1996 | Question: 2.25
A micro program control unit is required to generate a total of $25$ control signals. Assume that during any micro instruction, at most two control signals are active. Minimum number of bits required in the control word to generate the required control signals will be: $2$ $2.5$ $10$ $12$
A micro program control unit is required to generate a total of $25$ control signals. Assume that during any micro instruction, at most two control signals are active. Mi...
Kathleen
24.6k
views
Kathleen
asked
Oct 9, 2014
CO and Architecture
gate1996
co-and-architecture
microprogramming
normal
+
–
35
votes
3
answers
76
GATE CSE 1997 | Question: 5.3
A micro instruction is to be designed to specify: none or one of the three micro operations of one kind and none or upto six micro operations of another kind The minimum number of bits in the micro-instruction is: $9$ $5$ $8$ None of the above
A micro instruction is to be designed to specify:none or one of the three micro operations of one kind andnone or upto six micro operations of another kindThe minimum num...
Kathleen
11.3k
views
Kathleen
asked
Sep 29, 2014
CO and Architecture
gate1997
co-and-architecture
microprogramming
normal
+
–
42
votes
5
answers
77
GATE CSE 2013 | Question: 28
Consider the following sequence of micro-operations. MBR ← PC MAR ← X PC ← Y Memory ← MBR Which one of the following is a possible operation performed by this sequence? Instruction fetch Operand fetch Conditional branch Initiation of interrupt service
Consider the following sequence of micro-operations.MBR ← PC MAR ← X PC ← Y Memory ← MBRWhich one of the following is a possible operation performed by this seque...
Arjun
14.9k
views
Arjun
asked
Sep 24, 2014
CO and Architecture
gatecse-2013
co-and-architecture
microprogramming
normal
+
–
15
votes
2
answers
78
GATE CSE 1999 | Question: 2.19
Arrange the following configuration for CPU in decreasing order of operating speeds: Hard wired control, Vertical microprogramming, Horizontal microprogramming. Hard wired control, Vertical microprogramming, Horizontal microprogramming. Hard ... , Vertical microprogramming, Hard wired control. Vertical microprogramming, Horizontal microprogramming, Hard wired control.
Arrange the following configuration for CPU in decreasing order of operating speeds:Hard wired control, Vertical microprogramming, Horizontal microprogramming.Hard wired ...
Kathleen
7.3k
views
Kathleen
asked
Sep 23, 2014
CO and Architecture
gate1999
co-and-architecture
microprogramming
normal
+
–
39
votes
2
answers
79
GATE CSE 2004 | Question: 67
The microinstructions stored in the control memory of a processor have a width of $26$ bits. Each microinstruction is divided into three fields: a micro-operation field of $13$ bits, a next address field $(X),$ and a MUX select field $(Y).$ There are $8$ status bits in the ... of the control memory in number of words? $10, 3, 1024$ $8, 5, 256$ $5, 8, 2048$ $10, 3, 512$
The microinstructions stored in the control memory of a processor have a width of $26$ bits. Each microinstruction is divided into three fields: a micro-operation field o...
Kathleen
13.4k
views
Kathleen
asked
Sep 18, 2014
CO and Architecture
gatecse-2004
co-and-architecture
microprogramming
normal
+
–
14
votes
2
answers
80
GATE CSE 2002 | Question: 2.7
Horizontal microprogramming: does not require use of signal decoders results in larger sized microinstructions than vertical microprogramming uses one bit for each control signal all of the above
Horizontal microprogramming:does not require use of signal decodersresults in larger sized microinstructions than vertical microprogramminguses one bit for each control ...
Kathleen
5.1k
views
Kathleen
asked
Sep 15, 2014
CO and Architecture
gatecse-2002
co-and-architecture
microprogramming
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