# Recent questions tagged page-table

1
Which of the following is added to the page table in order to track whether a page of cache has been modified since it was read from the memory? Reference bit Dirty bit Tag bit Valid bit
1 vote
2
A machine has $48-bit$ virtual addresses and $32-bit$ physical addresses. Pages are $8\: KB.$ How many entries are needed for a single-level linear page table?
3
A computer has $32-bit$ virtual addresses and $4-KB$ pages. The program and data together fit in the lowest page $(0–4095)$ The stack fits in the highest page. How many entries are needed in the page table if traditional (one-level) paging is used? How many page table entries are needed for two-level paging, with $10$ bits in each part?
4
A computer with a $32-bit$ address uses a two-level page table. Virtual addresses are split into a $9-bit$ top-level page table field, an $11-bit$ second-level page table field, and an offset. How large are the pages and how many are there in the address space?
5
Section $3.3.4$ states that the Pentium Pro extended each entry in the page table hierarchy to $64$ bits but still could only address only $4\: GB$ of memory. Explain how this statement can be true when page table entries have $64$ bits.
6
Suppose that a machine has $438-bit$ virtual addresses and $32-bit$ physical addresses. What is the main advantage of a multilevel page table over a single-level one? With a two-level page table, $16-KB$ pages, and $4-byte$ entries, how many bits should be allocated for the top-level page table field and how many for the next level page table field? Explain.
7
Suppose that a machine has $48-bit$ virtual addresses and $32-bit$ physical addresses. If pages are $4\: KB$, how many entries are in the page table if it has only a single level? Explain. Suppose this same system has a $TLB$ (Translation Lookaside Buffer ... and it sequentially reads long integer elements from an array that spans thousands of pages. How effective will the $TLB$ be for this case?
8
A machine has a $32-bit$ address space and an $8-KB$ page. The page table is entirely in hardware, with one $32-bit$ word per entry. When a process starts, the page table is copied to the hardware from memory, at one word every $100\: nsec.$ If each process runs for $100\: msec$ (including the time to load the page table), what fraction of the $CPU$ time is devoted to loading the page tables?
9
I have read that paging does not suffer from external fragmentation as the frames and the pages are all of the equal sizes, but when we store a last level page table in a frame at that time it may not fully occupy the frame. Similarly, if n such page ... gaps exceed a page size. Then there should be external fragmentation, right? So why is it said that paging does not have external fragmentation?
1 vote
10
What is the mode(User/Kernel) of the Operating System when a Page Table or TLB are being accessed?
1 vote
11
Consider a byte addressable virtual memory system with 34-bit addresses where the first 23 bits are used as a page number, and the last 11 bits is the offset. Suppose the system using two-level paging, with first n bits of the address used as an index into the first-level page table. Assume that a typical ... by 1. 2^(34−n−11) x 2^11 2. 2^24 /2^(34−n−11) 3. 2^24 / 2^(34−n) 4. 2^(n−11) x 2^11
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Consider a system with page size 2^13 bytes , a2 level page table organization PTE size 32 bits with following format. Bit0: present bit Bit1:valid bit Bit2:dirty bit Bit6-29: physical frame no. Other bits insignificant. If last level PTE for the virtual address 0x12345678 has value 0x103 and processor trying to read a inst. From that address.what memory address will be read?
1 vote
14
Consider a machine with byte addressable memory 32 bits virtual addresses, 32 bits physical addresses and 4 KB page size. If a two-level page table system is used where each page table occupies one page and page table entries of 4 B each. How to calculate the size of 1st level page table & 2nd level page table(s) ? Also how to calculate memory overhead?
15
Why do we need multilevel paging? According to me the reason is that page table needs contiguous memory allocation.So if page table size is too large, we may not be able to store the table in contiguous memory. So is this the reason behind multilevel paging? Also when we page the page table, do we store all levels page table in memory or only the outer level page table?
1 vote
16
Consider a computer system using 2-level paging with TLB. The logical address supported is 32 bits. The page table is divided into 512 pages each of size 1KB. Page table entry size at 1st level is 2Bytes and that at the second level is 4 Bytes each. What is the ... For first level PT)+$512*1KB$(At second level)=$544KB$ Is my analysis correct? Below is the visualisation what I see is happening.
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18
A page table based translation will always consume less memory to store translation meta-data, than a seg-mentation based solution. True/False. Explain.
1 vote
19
I have watched two video lectures on OS memory management (PK Biswas and IISc Mathew Jacob). In both lectures they say that the compiler assumes (while compiling and generating the logical addresses to instructions) that for each process, all of the virtual address space is ... the page table of each process consists of same number of entries..? Is it the real reason to use valid/invalid bit ?
20
Consider a system with byte-addressable memory, 32 bit logical addresses, 4 kilobyte page size and page table entries of 4 bytes each. The size of the page table in the system in bytes is __________________
21
Can I calculate Page Table Size by just multiplying No. Of Pages & Frame No. if PTE size is not given?
1 vote
22
Given 64 bit logical space, Page Size = $4KB$. Do the three level paging? My Solution:- 1. Since address space is =$2^{64} Bytes$ Page size = $2^{12}$ Bytes. Number of entries in third level Page table is :- $2^{64} / 2^{12}$ = $2^{52}$. Size of third level ... three levels as:- $1st$ level $2nd$ level $3rd$ level Offset $32$ $10$ $10$ $12$ Please explain how did they find this out ? Please :)
1 vote
23
In multi-level paging, a big page table is divided into smaller pages and for those pages (of main page table) a new page table is created. So what be basically did is broke down the main page table into small pieces (usually so to reduce the size of parts to page size). But, the overall size of the main page table remain same, right? Then what actually is the benefit of multilevel paging?
24
The Operating System on a hypothetical computer provides its users with a virtual memory space of 232 bytes. But the computer has only 64 megabytes (226 bytes) of physical memory. This virtual memory is implemented using paging with a page size of 1024 (210) bytes. (10%) To what page number does virtual address 0x12345678 refer?
1 vote
25
Main-Memory Size=64MB, Logical address-32bits long, Page size-4KB, What is the total space wasted in maintaining the page table? Soln- 220(No. of pages) * 2B(14bits~2B)(frame-address-bits) = 2MB In this question why we consider the total no of pages in the ... no. of page table entries? I don't know why such confusions come in such a crucial time! Please answer and clear my confusion asap!
1 vote
26
A system uses optimal policy for a page replacement. It has 4 page frames with no pages loaded to begin with. Consider the following scenario Case-1: System first accesses 200 distinct pages in sequential order and then access same 200 distinct pages in same ... and then access same 200 distinct page in reverse order. The difference in the number of faults occurred in both case are _________.
1 vote
27
This question was asked in one of the assignments: http://www.cs.utexas.edu/~lorenzo/corsi/cs372/06F/hw/3sol.html But I'm not clear with the explanation. Can someone please explain how to solve this?