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Recent questions tagged self-doubt
0
votes
1
answer
151
SELF DOUBT
In Single Precision floating point number when E=0 and M not equals to 0 it represents a fractional form..(BiAS=+127) when writing the decimal form why do we right (-1)^S * (1.M) * 2^(-126) instead of (-1)^S * (1.M) * 2^(-127)??
In Single Precision floating point number when E=0 and M not equals to 0 it represents a fractional form..(BiAS=+127)when writing the decimal form why do we right (-1)^S...
DIYA BASU
492
views
DIYA BASU
asked
Feb 10, 2019
Digital Logic
digital-logic
number-representation
ieee-representation
floating-point-representation
self-doubt
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0
votes
0
answers
152
self doubt
https://gateoverflow.in/2308/gate1993-11 This question can also be solved as a probability question where the random space contains (M1),(M1,M2),(M1,M2,M3) and let X be the random variable which gives the time for any of the three options selected from the ... space and correspondingly we give the PMF for each time selected and then we find the expectation?? Am I correct with my logic??
https://gateoverflow.in/2308/gate1993-11 This question can also be solved as a probability question where the random space contains (M1),(M1,M2),(M1,M2,M3) and let X be t...
DIYA BASU
202
views
DIYA BASU
asked
Feb 2, 2019
CO and Architecture
co-and-architecture
cache-memory
self-doubt
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–
1
votes
0
answers
153
GO_DecidabilitySlides
This is from GO Decidability slides. I have a doubt with 3 & 4 which is saying every TM ACCEPT L since accepted implies that it rejects all which is not part of language.Why we are using ACCEPTED instead of the word RECOGNISED?
This is from GO Decidability slides.I have a doubt with 3 & 4 which is saying every TM ACCEPT L since accepted implies that it rejects all which is not part of language.W...
Abbas Ahmad
222
views
Abbas Ahmad
asked
Jan 27, 2019
Theory of Computation
decidability
self-doubt
+
–
0
votes
0
answers
154
Virtual Memory (Self Doubt)
I have a simple doubt, Given a question that says that memory access time is x and page fault service time is y. We apply T = h*x + (1-h)*y Here assuming single level pagetable I suppose x is the time for accessing the page table and getting ... frame I 0) why he considered here an extra access ? Reference : https://gateoverflow.in/85404/gate1990-7-b Help me out here :(
I have a simple doubt, Given a question that says that memory access time is x and page fault service time is y. We applyT = h*x + (1-h)*yHere assuming single level paget...
Na462
266
views
Na462
asked
Jan 17, 2019
Operating System
operating-system
virtual-memory
paging
effective-memory-access
self-doubt
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0
votes
0
answers
155
Doubt: gate2005 2015
https://gateoverflow.in/3784/gate2005-it-37 https://gateoverflow.in/8159/gate2015-2-35 (the second answer of this question) both these follow different diagramatic representations how should one go about making these diagrams
https://gateoverflow.in/3784/gate2005-it-37https://gateoverflow.in/8159/gate2015-2-35 (the second answer of this question)both these follow different diagramatic represen...
TUSHAR_BHATT
600
views
TUSHAR_BHATT
asked
Jan 10, 2019
Theory of Computation
gatecse-2015-set2
gateit-2005
self-doubt
+
–
0
votes
1
answer
156
Made easy theory book
Solve this.
Solve this.
Jyoti Kumari97
845
views
Jyoti Kumari97
asked
Dec 30, 2018
Digital Logic
made-easy-booklet
self-doubt
digital-logic
decoder
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–
0
votes
0
answers
157
MadeEasy WorkBook: Digital Logic - Multiplexer
Can any explain the output function F? According to me F=(Z'C'+Z'C)
Can any explain the output function F? According to me F=(Z'C'+Z'C)
Jyoti Kumari97
538
views
Jyoti Kumari97
asked
Dec 29, 2018
Digital Logic
digital-logic
self-doubt
multiplexer
made-easy-booklet
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–
0
votes
0
answers
158
MadeEasy WorkBook: Digital Logic - Multiplexer
Can anyone explain this.??
Can anyone explain this.??
Jyoti Kumari97
356
views
Jyoti Kumari97
asked
Dec 29, 2018
Digital Logic
self-doubt
digital-logic
multiplexer
made-easy-booklet
+
–
0
votes
0
answers
159
DOUBT ON MINIMAL SPANNING TREE
II. if an edge (u,v) is contained in some minimum spanning tree, then it is a light edge crossing some cut of the graph. III. If (u,v) is a light edge connecting CC(connected component) to some other component in the forest of graph ... spanning tree. didn't understand the part light edge crossing some cut of the graph can someone explain me with the diagram ??
II. if an edge (u,v) is contained in some minimum spanning tree, then it is a light edge crossing some cut of the graph.III. If (u,v) is a light edge connecting CC(conne...
Magma
523
views
Magma
asked
Dec 28, 2018
Algorithms
self-doubt
minimum-spanning-tree
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0
votes
0
answers
160
Self doubt
Is the instruction decode step a part of the execution cycle? Or not. There are ambiguous answers on the gate 2005 question stating answers as 4 and 6 memory read
Is the instruction decode step a part of the execution cycle? Or not. There are ambiguous answers on the gate 2005 question stating answers as 4 and 6 memory read
Manoj Kumar Pandey
201
views
Manoj Kumar Pandey
asked
Dec 24, 2018
CO and Architecture
co-and-architecture
self-doubt
+
–
1
votes
1
answer
161
MadeEasy WorkBook: Theory of Computation - Context Free Language
CNF may contain the following (a) null productions (b) unit productions (c) useless symbols (d) all of the above Given answer is (c) But in CNF A-->BC A-->a So, answer should be (b), isn't it?
CNF may contain the following(a) null productions(b) unit productions(c) useless symbols(d) all of the aboveGiven answer is (c)But in CNFA >BCA >aSo, answer should be (b)...
Jyoti Kumari97
344
views
Jyoti Kumari97
asked
Dec 19, 2018
Theory of Computation
theory-of-computation
self-doubt
context-free-language
made-easy-booklet
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–
0
votes
0
answers
162
confusion
What is the difference between ‘performance gain’ and ‘speed up’?
What is the difference between ‘performance gain’ and ‘speed up’?
mks_cse
139
views
mks_cse
asked
Dec 17, 2018
CO and Architecture
co-and-architecture
speedup
self-doubt
+
–
0
votes
0
answers
163
MadeEasy Theorybook: Theory of Computation - Context Free Languages
According to the given formula above, how many productions should be there ? S-->aAbB A-->aA | a B-->bB | b According to me., it should be 17 but in the book answer is 9, can anyone tell me how? mage widget
According to the given formula above, how many productions should be there ? S >aAbBA >aA | aB >bB | bAccording to me., it should be 17 but in the book answer is 9, can a...
Jyoti Kumari97
485
views
Jyoti Kumari97
asked
Dec 15, 2018
Theory of Computation
theory-of-computation
context-free-language
self-doubt
made-easy-booklet
+
–
0
votes
0
answers
164
How much time does it take to solve every problem in the GO Book,all 3 volumes?
What should my strategy be now as I have to cover OS,DLD,Maths,CN and CO along with revision and taking full length tests. I really don’t know what to do about aptitude. Edit 1: Can people share strategies as to how to divide the syllabus and solve the problems.
What should my strategy be now as I have to cover OS,DLD,Maths,CN and CO along with revision and taking full length tests.I really don’t know what to do about aptitude....
sripo
1.6k
views
sripo
asked
Dec 6, 2018
GATE
syllabus
self-doubt
preparation
usergate2019
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0
votes
1
answer
165
sql doubt
please give an example to differentiate between self join , natural join and join operation.
please give an example to differentiate between self join , natural join and join operation.
Satbir
300
views
Satbir
asked
Dec 4, 2018
Databases
sql
databases
self-doubt
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–
0
votes
0
answers
166
Self Doubt
T(n)=4T(√n)+n How can we solve it using master theorem using subsitution and renaming.
T(n)=4T(√n)+nHow can we solve it using master theorem using subsitution and renaming.
jatin khachane 1
311
views
jatin khachane 1
asked
Dec 1, 2018
Algorithms
algorithms
master-theorem
self-doubt
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1
votes
0
answers
167
Self Doubt
A.2^(loglogn)^2, B.(2^(root(logn)) Asymptotic Order
A.2^(loglogn)^2,B.(2^(root(logn))Asymptotic Order
Abhisek Tiwari 4
430
views
Abhisek Tiwari 4
asked
Dec 1, 2018
Algorithms
self-doubt
asymptotic-notation
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–
0
votes
0
answers
168
Self doubt on Memory Interfacing 2
A computer uses RAM Chips of 512X8 and ROM Chips of 2048x8. The computer needs 2K Bytes of RAM, 4K Bytes of ROM, and 4 interface units each with 4 registers. A Memory Mapped I/O configuration is used. How many RAM Chips and ROM Chips are required?
A computer uses RAM Chips of 512X8 and ROM Chips of 2048x8. The computer needs 2K Bytes of RAM, 4K Bytes of ROM, and 4 interface units each with 4 registers. A Memory Map...
Balaji Jegan
384
views
Balaji Jegan
asked
Nov 27, 2018
CO and Architecture
co-and-architecture
memory-interfacing
self-doubt
numerical-answers
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–
0
votes
1
answer
169
Self doubt on Memory Interfaacing
A computer uses RAM Chips of 512X8 and ROM Chips of 2048x8. The computer needs 2K Bytes of RAM, 4K Bytes of ROM and 4 interface units each with 4 registers. An I/O mapped I/O configuration is used. How many RAM Chips and ROM Chips are required?
A computer uses RAM Chips of 512X8 and ROM Chips of 2048x8. The computer needs 2K Bytes of RAM, 4K Bytes of ROM and 4 interface units each with 4 registers. An I/O mapped...
Balaji Jegan
2.1k
views
Balaji Jegan
asked
Nov 26, 2018
CO and Architecture
co-and-architecture
memory-interfacing
self-doubt
numerical-answers
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0
votes
0
answers
170
Self Doubt COA
https://gateoverflow.in/63585/pipelining Can anyone Explain the meaning of the line- "Assume that no instruction starts at first stage time the branch condition is evaluated"
https://gateoverflow.in/63585/pipeliningCan anyone Explain the meaning of the line-"Assume that no instruction starts at first stage time the branch condition is evaluate...
Soumya Tiwari
177
views
Soumya Tiwari
asked
Nov 16, 2018
CO and Architecture
co-and-architecture
pipelining
self-doubt
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–
1
votes
0
answers
171
Self Doubt COA
I'm not able to understand how pipelining reduces memory requirements of programs. Anyone please explain.
I'm not able to understand how pipelining reduces memory requirements of programs. Anyone please explain.
Soumya Tiwari
354
views
Soumya Tiwari
asked
Nov 15, 2018
CO and Architecture
co-and-architecture
pipelining
self-doubt
+
–
0
votes
0
answers
172
Made easy test series
In the following question https://gateoverflow.in/192674/made-easy-test-series Why has block offset being considered as 4bits? It is mentioned in the question that memory is word addressable data words are word-addressable. Then why are we not computing the bits ... in terms of words rather than bytes? Shouldnt the block offset be 2 bits as 4 words are present in a block?
In the following question https://gateoverflow.in/192674/made-easy-test-seriesWhy has block offset being considered as 4bits? It is mentioned in the question that memory ...
Somoshree Datta 5
280
views
Somoshree Datta 5
asked
Nov 11, 2018
CO and Architecture
co-and-architecture
made-easy-test-series
self-doubt
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–
0
votes
3
answers
173
Compiler Design Doubt
S->Aa | Bc A->a B->a 1. Is the above grammer left factored ?? If not ,then do left factoring on it ?? 2. Is above grammer deterministic ?? 3. Is every left factored grammer deterministic ??
S->Aa | Bc A->a B->a1. Is the above grammer left factored ?? If not ,then do left factoring on it ??2. Is above grammer deterministic ?? 3. Is every left factored...
Dheeraj Pant
844
views
Dheeraj Pant
asked
Nov 8, 2018
Compiler Design
compiler-design
grammar
self-doubt
parsing
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–
0
votes
0
answers
174
FLOATING POINT
https://gateoverflow.in/80201/gate1987-1-vii NOT GETTING ITS ANSWER .......
https://gateoverflow.in/80201/gate1987-1-viiNOT GETTING ITS ANSWER .......
eyeamgj
249
views
eyeamgj
asked
Nov 6, 2018
CO and Architecture
co-and-architecture
floating-point-representation
self-doubt
+
–
0
votes
0
answers
175
Self Doubt
In this question, https://gateoverflow.in/69709/pipelining Kapil Sir had commented that we can do split phase access between memory access(MA) stage and execute(EX) stage of a pipeline..but how is split phase access possible here? As far as i know, memory ... in this link https://gateoverflow.in/252781/operand-forwarding Can we use split phase access between MA and EX stage in this case?
In this question, https://gateoverflow.in/69709/pipelining Kapil Sir had commented that we can do split phase access between memory access(MA) stage and execute(EX) stag...
Somoshree Datta 5
453
views
Somoshree Datta 5
asked
Nov 5, 2018
CO and Architecture
co-and-architecture
pipelining
self-doubt
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–
0
votes
0
answers
176
General
How to see my bookmark question ?
How to see my bookmark question ?
Vishal sakariya
2.3k
views
Vishal sakariya
asked
Nov 4, 2018
Others
general
self-doubt
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–
0
votes
1
answer
177
self doubt
The uPC is not incremented in the following cases : (i)When an end microinstruction is encountered. (ii)When a new instruction is loaded into IR(instruction register) (iii)When a branch microinstruction is encountered and branch condition is satisfied. Someone, please explain the last point. I didn't get why it will not be incremented. These statements are from the standard book
The uPC is not incremented in the following cases :(i)When an end microinstruction is encountered.(ii)When a new instruction is loaded into IR(instruction register)(iii)W...
amitqy
331
views
amitqy
asked
Nov 4, 2018
CO and Architecture
co-and-architecture
cpu-design
microprogramming
self-doubt
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–
0
votes
0
answers
178
SELF DOUBT
PLEASE explain what is operand forwarding and how we are going to implement this in stages during execution of the instruction ??? and also when to use it in according to question property and not when to use it ? pls check these questions of same concept also ... this phenomena . i am not getting it if someone got the link of operand forwarding from where should i hv done this plzz add
PLEASE explain what is operand forwarding and how we are going to implement this in stages during execution of the instruction ???and also when to use it in according to...
Deepanshu
286
views
Deepanshu
asked
Nov 3, 2018
CO and Architecture
co-and-architecture
pipelining
operand-forwarding
self-doubt
+
–
1
votes
1
answer
179
self doubt
Difference between both synchronous and asynchronous I/O on the based of ISR . Means when they are going to invoked during i/o completion ( i.e. before, after ?????? )
Difference between both synchronous and asynchronous I/O on the based of ISR . Means when they are going to invoked during i/o completion ( i.e. before, after ?????? )
Deepanshu
323
views
Deepanshu
asked
Nov 3, 2018
CO and Architecture
co-and-architecture
input-output
self-doubt
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–
0
votes
0
answers
180
SELF DOUBT
S1 S2 S3 S4 I1: 1 2 1 2 I2: 2 1 2 1 I3: 1 1 2 1 I4: 2 1 2 1 Consider a pipeline processor with 4 stages S1 to S4. We want to execute the following loop for (i = 1; i < = 10; i++) {I1, I2, I3, I4} The output of I1 for i = 2 will be available after 11 ns 12ns 13 ns 28 ns
S1S2S3S4I1:1212I2:2121I3:1121I4:2121 Consider a pipeline processor with 4 stages S1 to S4. We want to execute the following loopfor (i = 1; i < = 10; i++) {I1, I2, I3, I4...
Deepanshu
665
views
Deepanshu
asked
Nov 2, 2018
CO and Architecture
co-and-architecture
pipelining
self-doubt
+
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