# Recent questions tagged synchronous-asynchronous-circuits

1
The boolean functions for the input of SR latch are as follows. Obtain the circuit diagram using a minimum number of NAND gates. $S = x _1’x _2’x _3 + x _1x _2x _3$. $R = x _1x _2’ + x _2x _3’$
2
Draw the logic diagram of the product of sum expression $Y = (x _1 + x _2’)(x _2 + x _3)$ Show that there is a static 0 hazard when $x _1$ and $x _3$ is equal to zero and $x _2$ goes from 0 to 1.Find a way to remove hazard by adding one more OR gate.
3
Find a circuit that has no static hazard and implements the boolean function: F(A,B,C,D) = $\sum(0,2,6,7,8,10,12)$
4
Merge each of the primitive flow table shown in the figure. Proceed as follows: Find all compatible pairs by means of implication table. Find the maximal compatibles by means of a merger diagram FInd the minimal set of compatibles that covers all the states and is closed.
5
Reduce the number of states in the state table listed below. Use an implication table.
6
Using the implication table method, show that the state table listed in the figure cannot be reduced any further.
7
Assign output values to the don’t care states in the flow tables in the figure below in such a way as to avoid transient output places
8
It is necessary to design an asynchronous sequential circuit with two inputs, $x _1 and x _2$, and one output $z$. Initially, both input and output are zero. when $x _1 and x _2$ becomes 1, z becomes 1. when the second input also becomes 1, the output ... primitive flow table for the circuit and show that it can be reduced to the flow table shown in the figure complete the design of the circuit.
1 vote
9
A traffic light is installed at the junction of the railroad and a road. The traffic light is controlled by two switches in the rails placed one mile apart on either side of the junction. A switch is turned on when a train is over it and is turned off ... primitive flow table for the circuit. show that the flow table can be reduced to four rows Complete the circuit specified in the above problem.
10
Obtain a primitive flow table for a circuit with two inputs, $x _1 and x _2$ and two outputs $y _1 and y _2$, that satisfy the following four conditions. When $x _1x _2 = 00$, the output is $z _1z _2 = 00$. when $x _1 = 1$ and $x _2$ ... $x _2 = 1$ and $x _1$ changes from 0 to 1, the output is $z _1z _2$ = 10. otherwise the output does not change.
11
Implement the circuit defined below with NAND SR latch. An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the circuit are as follows. $Y _1 = x _1x _2 + x _1y _2’ + x _2’y _1$ $Y _2 = x _2 + x _1y _1’y _2 + x _1’y _1$ $z = x _2 + y _1$
12
Implement the circuit with defined below with NOR SR latch. an asynchronous circuit is described by the following excitation and output functions: $Y = x _1x _2’ + (x _1 + x _2’)y$ $z = y$
13
For the asynchronous sequential circuit shown in the figure: Derive the boolean functions for the outputs of two SR latches $Y _1 and Y _2$. Note that the S input of the second latch is $x _1’y _1’$. Derive the transition table and output map of the circuit.
14
Convert the circuit of the figure to the asynchronous sequential circuit by removing the clock-pulse(CP) and changes the flip-flops to the SR latches. Derive the transition table and output map of the modified circuit.
15
Analyze the T flip-flop shown in the figure. Obtain the transition table and show that the circuit is unstable when both T and CP are equal to 1.
16
Investigate the transition table of the figure and determine all the race conditions whether they are critical or not critical. Also, determine whether there are any cycles.
17
Convert the flow table of the figure into a transition table by assigning the following binary values to the states: a = 00, b = 11, and c = 10. Assign values to the extra fourth state to avoid critical races. Assign output to the don’t care states to avoid momentary false output. Derive the logic diagram of the circuit.
18
An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the circuit are as follows. $Y _1 = x _1x _2 + x _1y _2’ + x _2’y _1$ $Y _2 = x _2 + x _1y _1’y _2 + x _1’y _1$ $z = x _2 + y _1$ Draw the logic diagram of the circuit. Derive the transition table and the output map. Obtain a flow table for the circuit.
1 vote
19
an asynchronous circuit is described by the following excitation and output functions: $Y = x _1x _2’ + (x _1 + x _2’)y$ $z = y$ Draw the logic diagram of the circuit. Derive the transition table and the output map. obtain a two-state flow table. Describe in the words the behavior of the circuit.
20
Derive a transition table for the asynchronous sequential circuit given in the figure. Determine the sequence of the internal states $y _1Y _2$ for the following sequence of the input $x _1x _2$: 00,10,11,01,11,10,00. ​
21
Explain the difference between synchronous and asynchronous sequential circuits. Define fundamental mode operation. Explain the difference between stable and unstable states. what is the difference between an internal state or a total state?
22
Word number 535 in the memory shown in the figure contains the binary equivalent of 2209. List the 10 bit address and 16-bit memory content of the word.
23
The following memory units are specified by the number of words times the number of bits per word. How many address lines and Input output data lines are needed in each case given below? $2K \times 16$; $64K \times 8$; $16M \times 32$; $96K \times 12$;
24
Show the circuit and the timing diagram for generating six repeated timing signals, $T _0$ through $T _5$.
25
Add four 2-input AND gates to the circuit of the figure. One input in each gate is connected to one output of the decoder. The other input in each gate is connected to the clock. Label the outputs of the AND gate as $P _0,P _1,P _2, and P _3$. Show the timing diagram of the for P outputs.
26
Using a start signal as in the figure , construct a word time control that stays on for a period of 16 clock pulses.
27
Design a synchronous BCD counter with JK flip-flops