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Recent questions tagged synchronous-asynchronous-circuits

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Draw the logic diagram of the product of sum expression $ Y = (x _1 + x _2’)(x _2 + x _3)$ Show that there is a static 0 hazard when $x _1$ and $x _3$ is equal to zero and $x _2$ goes from 0 to 1.Find a way to remove hazard by adding one more OR gate.
asked Apr 8, 2019 in Digital Logic ajaysoni1924 71 views
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Merge each of the primitive flow table shown in the figure. Proceed as follows: Find all compatible pairs by means of implication table. Find the maximal compatibles by means of a merger diagram FInd the minimal set of compatibles that covers all the states and is closed.
asked Apr 8, 2019 in Digital Logic ajaysoni1924 52 views
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It is necessary to design an asynchronous sequential circuit with two inputs, $x _1 and x _2$, and one output $z$. Initially, both input and output are zero. when $x _1 and x _2$ becomes 1, z becomes 1. when the second input also becomes 1, the output ... primitive flow table for the circuit and show that it can be reduced to the flow table shown in the figure complete the design of the circuit.
asked Apr 8, 2019 in Digital Logic ajaysoni1924 37 views
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A traffic light is installed at the junction of the railroad and a road. The traffic light is controlled by two switches in the rails placed one mile apart on either side of the junction. A switch is turned on when a train is over it and is turned off ... primitive flow table for the circuit. show that the flow table can be reduced to four rows Complete the circuit specified in the above problem.
asked Apr 8, 2019 in Digital Logic ajaysoni1924 118 views
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Obtain a primitive flow table for a circuit with two inputs, $x _1 and x _2$ and two outputs $y _1 and y _2$, that satisfy the following four conditions. When $x _1x _2 = 00$, the output is $z _1z _2 = 00$. when $x _1 = 1$ and $x _2$ ... $x _2 = 1$ and $x _1$ changes from 0 to 1, the output is $z _1z _2$ = 10. otherwise the output does not change.
asked Apr 8, 2019 in Digital Logic ajaysoni1924 61 views
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Implement the circuit defined below with NAND SR latch. An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the circuit are as follows. $Y _1 = x _1x _2 + x _1y _2’ + x _2’y _1$ $Y _2 = x _2 + x _1y _1’y _2 + x _1’y _1$ $z = x _2 + y _1$
asked Apr 8, 2019 in Digital Logic ajaysoni1924 35 views
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For the asynchronous sequential circuit shown in the figure: Derive the boolean functions for the outputs of two SR latches $Y _1 and Y _2$. Note that the S input of the second latch is $x _1’y _1’$. Derive the transition table and output map of the circuit.
asked Apr 7, 2019 in Digital Logic ajaysoni1924 158 views
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Convert the circuit of the figure to the asynchronous sequential circuit by removing the clock-pulse(CP) and changes the flip-flops to the SR latches. Derive the transition table and output map of the modified circuit.
asked Apr 7, 2019 in Digital Logic ajaysoni1924 56 views
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Convert the flow table of the figure into a transition table by assigning the following binary values to the states: a = 00, b = 11, and c = 10. Assign values to the extra fourth state to avoid critical races. Assign output to the don’t care states to avoid momentary false output. Derive the logic diagram of the circuit.
asked Apr 7, 2019 in Digital Logic ajaysoni1924 58 views
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An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the circuit are as follows. $Y _1 = x _1x _2 + x _1y _2’ + x _2’y _1$ $Y _2 = x _2 + x _1y _1’y _2 + x _1’y _1$ $z = x _2 + y _1$ Draw the logic diagram of the circuit. Derive the transition table and the output map. Obtain a flow table for the circuit.
asked Apr 7, 2019 in Digital Logic ajaysoni1924 206 views
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an asynchronous circuit is described by the following excitation and output functions: $Y = x _1x _2’ + (x _1 + x _2’)y$ $z = y$ Draw the logic diagram of the circuit. Derive the transition table and the output map. obtain a two-state flow table. Describe in the words the behavior of the circuit.
asked Apr 7, 2019 in Digital Logic ajaysoni1924 51 views
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Explain the difference between synchronous and asynchronous sequential circuits. Define fundamental mode operation. Explain the difference between stable and unstable states. what is the difference between an internal state or a total state?
asked Apr 7, 2019 in Digital Logic ajaysoni1924 24 views
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The following memory units are specified by the number of words times the number of bits per word. How many address lines and Input output data lines are needed in each case given below? $2K \times 16$; $64K \times 8$; $16M \times 32$; $96K \times 12$;
asked Apr 6, 2019 in Digital Logic ajaysoni1924 47 views
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Add four 2-input AND gates to the circuit of the figure. One input in each gate is connected to one output of the decoder. The other input in each gate is connected to the clock. Label the outputs of the AND gate as $P _0,P _1,P _2, and P _3$. Show the timing diagram of the for P outputs.
asked Apr 6, 2019 in Digital Logic ajaysoni1924 35 views
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Change the asynchronous-clear-circuit of the figure to the synchronous-clear-circuit, The modified register will have parallel load capability and asynchronous clear capability, but no asynchronous clear circuit. The register is cleared synchronously when the clock pulse in the CP ... when the clock input CP goes through a negative transition while the D input of all the flip-flops are 0.
asked Apr 6, 2019 in Digital Logic ajaysoni1924 129 views
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Include a 2-input NAND gate with the register of the figure and connect the gate output to CP inputs of all the flip-flops. One input of the NAND gate receives input from the clock-pulse-generator. Another input of NAND gate provides parallel load control. Explain the operation of the modified register.
asked Apr 6, 2019 in Digital Logic ajaysoni1924 79 views
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Design the following non-binary sequence counter as specified in each case. Treat the unused states as don't cares conditions. Analyze the final circuit to ensure that it is self-correcting. If your design produces a non-self-correcting counter than modify the circuit to produce a ... Use T flip-flops. Design a counter with the following repeated binary sequence 0,1,3, 7,6,4. Use T flip-flops.
asked Apr 6, 2019 in Digital Logic ajaysoni1924 298 views
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