Recent questions tagged virtual-gate-test-series / GATE Overflow for GATE CSE

0 votes

1 answer

91

Virtual Gate Test Series: Digital Logic - Counter
I am not able to get any sequence which matches from the options :

I am not able to get any sequence which matches from the options :

Amit Pal

441 views

Amit Pal asked Jan 14, 2017

3 votes

1 answer

92

Virtual Gate Test Series: CO & Architecture - Micro Instruction
A micro control unit is having control word in the following format It has to generates $46$ control signals. Next address are selected based on $8$ conditional oblique flag information. If the control memory is having $80$ ... is ____bits$?$ I'm getting $61$ also what will be the answer in case of vertical micro-programming.

A micro control unit is having control word in the following formatIt has to generates $46$ control signals. Next address are selected based on $8$ conditional oblique fl...

Pankaj Joshi

869 views

Pankaj Joshi asked Jan 14, 2017

4 votes

1 answer

93

Virtual Gate Test Series: CO & Architecture - Data Path Delay
A multiplier data path is shown below In the avove data path the delay of the elements are as follows$:$ $R_{1}$ and $R_{2}:2ns$ $\text{ADDER:30ns}$ $R_{3}$ and $R_{4}:10ns$ $\text{MUX:25ns}$ The maximum clock frequency at which the data path can operate is ______ $\text{MHZ}$.

A multiplier data path is shown belowIn the avove data path the delay of the elements are as follows$:$$R_{1}$ and $R_{2}:2ns$$\text{ADDER:30ns}$$R_{3}$ and $R_{4}:10ns$$...

Pankaj Joshi

657 views

Pankaj Joshi asked Jan 14, 2017

0 votes

1 answer

94

Virtual Gate Test Series: CO & Architecture - Pipelining
I feel the question is incomplete or is there some way to find out stall cycles and solve it?

I feel the question is incomplete or is there some way to find out stall cycles and solve it?

Pankaj Joshi

319 views

Pankaj Joshi asked Jan 14, 2017

0 votes

1 answer

95

Virtual Gate Test Series: CO & Architecture - Cache Access
my question is even in case of a miss the cache will still be accessed and then main memory, right? please explain this when to consider higher memory level access time and when not to consider it

my question is even in case of a miss the cache will still be accessed and then main memory, right? please explain this when to consider higher memory level access time a...

Pankaj Joshi

305 views

Pankaj Joshi asked Jan 13, 2017

1 votes

1 answer

96

Virtual Gate Test Series: CO & Architecture - Unpipelined Processor
Is this solution right? how can the assume buffer latency to be 1? and isn't the latency of pipeline = cycle time

Is this solution right? how can the assume buffer latency to be 1? and isn't the latency of pipeline = cycle time

Pankaj Joshi

241 views

Pankaj Joshi asked Jan 13, 2017

0 votes

0 answers

97

Virtual Gate Test Series: Operating System - Dual Mode Operation
What is the purpose of dual-mode operation$?$ To enable the operating system to take control of the processor To save power To protect the OS and hardware from corruption To distinguish an ordinary user from a super-user

What is the purpose of dual-mode operation$?$To enable the operating system to take control of the processorTo save powerTo protect the OS and hardware from corruptionTo ...

Purple

289 views

Purple asked Jan 13, 2017

0 votes

1 answer

98

Virtual Gate Test Series: Operating System - Set Of Process
I don't think any of the options is right. What will be the answer?

I don't think any of the options is right. What will be the answer?

Purple

622 views

Purple asked Jan 13, 2017

0 votes

2 answers

99

Virtual Gate Test Series: Operating System - SJF (Exponential Averaging)
Calculate the Exponential averaging for the $\text{SJF}$ with $T_{1}=10,\alpha = 0.5$ and previous runs as $8,7,4,16$ $\text{(Give the answer correct to one decimal place).}$

Calculate the Exponential averaging for the $\text{SJF}$ with $T_{1}=10,\alpha = 0.5$ and previous runs as $8,7,4,16$$\text{(Give the answer correct to one decimal place)...

Purple

840 views

Purple asked Jan 13, 2017

4 votes

1 answer

100

Virtual Gate Test Series: Programming & DS - Binary Search Tree
What is the correct answer?

What is the correct answer?

Purple

721 views

Purple asked Jan 12, 2017

0 votes

1 answer

101

Virtual Gate Test Series: Theory Of Computation - Languages
For $A,B\subseteq \Sigma ^{*},$ define $A/B=\{x\in\Sigma^{*}\mid \exists y\in B,xy\in A\}$ If $L$ is a $\text{CFL}$ and $R$ is $\text{Regular},$ then $L/R$ is$?$ Regular CFL but not Regular Recursive but not CFL None of the above

For $A,B\subseteq \Sigma ^{*},$ define$A/B=\{x\in\Sigma^{*}\mid \exists y\in B,xy\in A\}$If $L$ is a $\text{CFL}$ and $R$ is $\text{Regular},$ then $L/R$ is$?$RegularCFL ...

smartmeet

775 views

smartmeet asked Jan 12, 2017

0 votes

1 answer

102

Virtual Gate Test Series: Theory Of Computation - Languages
Answe is B, but why is L2 not regular? How to solve it? For L2, $ y=x^{1/n}$ I am not understanding why is this not right?

Answe is B, but why is L2 not regular? How to solve it? For L2, $ y=x^{1/n}$ I am not understanding why is this not right?

Purple

444 views

Purple asked Jan 12, 2017

0 votes

0 answers

103

Virtual Gate Test Series: Theory Of Computation - Context Sensitive Grammar
How can L(G) be regular? If we derive bSb --> bAcAb, now we have Ab-->b but we do not have the production bA since G is all production except last. So there is no production for A or bA. How can we go further?

How can L(G) be regular?If we derive bSb bAcAb, now we have Ab >b but we do not have the production bA since G is all production except last. So there is no production ...

Purple

422 views

Purple asked Jan 12, 2017

0 votes

3 answers

104

Virtual Gate Test Series: Algorithms - Minimum Spanning Tree
I think all options are wrong

I think all options are wrong

Purple

1.1k views

Purple asked Jan 11, 2017

2 votes

2 answers

105

Virtual Gate Test Series: Digital Logic - Counter

smartmeet

651 views

smartmeet asked Jan 10, 2017

1 votes

4 answers

106

Virtual Gate Test Series: Programming & DS - Output Of The Program
What will be the output$?$ int main() { int varl = 35,*var2,*var3; var2 = &var1; //suppose the address of var1 is 1006 var3 = var2; *var2++ = *var3++; var1++; printf("var1 = %d var2 = %d var3 = %d ",var1,var2,var3); return 0; } 36 1010 1010 38 1006 1006 37 1006 1010 38 1010 1006

What will be the output$?$int main() { int varl = 35,*var2,*var3; var2 = &var1; //suppose the address of var1 is 1006 var3 = var2; *var2++ = *var3++; var1++; ...

Purple

861 views

Purple asked Jan 10, 2017

1 votes

2 answers

107

Virtual Gate Test Series: Programming & DS - Output Of The Program
What is the output$?$ #define THIS #define THAT void main() { #ifdef THIS && THAT printf("I love beer"); #else printf("I love chicken"); #endif } I love beer I love chicken Segmentation fault Syntax error

What is the output$?$#define THIS #define THAT void main() { #ifdef THIS && THAT printf("I love beer"); #else printf("I love chicken"); #endif }I ...

Purple

324 views

Purple asked Jan 10, 2017

0 votes

1 answer

108

Virtual Gate Test Series: Programming & DS - String
Which functions of string include the null terminator '\0'? I know strlen() doesn't include the '\0' in giving the length, does anyone know which other functions include and which do not include?

Which functions of string include the null terminator '\0'? I know strlen() doesn't include the '\0' in giving the length, does anyone know which other functions include ...

Purple

372 views

Purple asked Jan 10, 2017

2 votes

4 answers

109

Virtual Gate Test Series: Compiler Design - Stack Allocation
Consider the following two statements$:$ $S_{1}:$ Activation records can have a permanent lifetime in case of static allocation. $S_{2}:$ Activation records can have nested lifetime in case of stack allocation. Which of the option is correct regarding $S_{1}$ and $S_{2}$ respectively True, True True, False False, True False, False

Consider the following two statements$:$ $S_{1}:$ Activation records can have a permanent lifetime in case of static allocation.$S_{2}:$ Activation records can have neste...

ManojK

1.5k views

ManojK asked Jan 9, 2017

0 votes

2 answers

110

Virtual Gate Test Series: Compiler Design - Triples
Which of the following is an advantage of $\text{'Triples'}$ Statements can be moved around Wastage of too much space Space is not wasted Two memory access per operation

Which of the following is an advantage of $\text{'Triples'}$Statements can be moved aroundWastage of too much spaceSpace is not wastedTwo memory access per operation

ManojK

970 views

ManojK asked Jan 9, 2017

1 votes

2 answers

111

Virtual Gate Test Series: Databases - Sql Query
Consider the following instances $R.$ A 1 2 3 4 B Null 1 2 2 The number of tuples returned by the following $\text{SQL query}$ is$?$ $>$select $*$ from $R$ as $R_{1}$ where not exists$($select $*$ from $R$ where $B = R_{1}.A)$

Consider the following instances $R.$A1234BNull122The number of tuples returned by the following $\text{SQL query}$ is$?$$>$select $*$ from $R$ as $R_{1}$ where not exist...

Purple

497 views

Purple asked Jan 9, 2017

4 votes

1 answer

112

Virtual Gate Test Series: Databases - Indexing
Consider a relation company with $3000$ records are of fixed length, with record size $50$ bytes are stored in block of size $512$ bytes $\text{(unspanned).}$ If a secondary index is built on the key field of size $10$ bytes and a block pointer of size $5$ bytes, the number of first level index blocks are_____$?$

Consider a relation company with $3000$ records are of fixed length, with record size $50$ bytes are stored in block of size $512$ bytes $\text{(unspanned).}$ If a second...

Purple

711 views

Purple asked Jan 9, 2017

2 votes

2 answers

113

Virtual Gate Test Series: Theory Of Computation - DFA
Number of states in the $\text{DFA}$ accepting the language $L=\{a^{n}b^{n}|1\leq n\leq 3\}$ over $\sum=\{a,b\}.$

Number of states in the $\text{DFA}$ accepting the language $L=\{a^{n}b^{n}|1\leq n\leq 3\}$ over $\sum=\{a,b\}.$

Jason GATE

568 views

Jason GATE asked Jan 8, 2017

0 votes

0 answers

114

Virtual Gate Test Series: Computer Networks - Round Trip Time
But I am getting 5.427 as Answer. And unfortunately that is given incorrect. Kindly Explain. Thnks.

But I am getting 5.427 as Answer. And unfortunately that is given incorrect.Kindly Explain. Thnks.

Jason GATE

580 views

Jason GATE asked Jan 8, 2017

0 votes

1 answer

115

Virtual Gate Test Series: Databases - Sql query

Jason GATE

451 views

Jason GATE asked Jan 8, 2017

0 votes

1 answer

116

Virtual Gate Test Series: Algorithms - Hash Table
plz explain?

plz explain?

Hradesh patel

420 views

Hradesh patel asked Jan 6, 2017

0 votes

1 answer

117

Virtual Gate Test Series: Algorithms - TSP Problem

firki lama

431 views

firki lama asked Dec 29, 2016

0 votes

1 answer

118

Virtual Gate Test Series: Algorithms - Huffman Coding

firki lama

420 views

firki lama asked Dec 29, 2016

1 votes

2 answers

119

Virtual Gate Test Series: Algorithms - Matrix Chain Ordering
Consider the following chain of matrices $A_{1}$ to $A_{4}$ having dimensions given below $A_{1}\rightarrow 2\times 3$ $A_{2}\rightarrow 3\times 5$ $A_{3}\rightarrow 5\times 4$ $A_{4}\rightarrow 4\times 2$ The following table is filled ... of scalar multiplications$:$ What are the values of $P$ and $Q?$ $60,140$ $60,82$ $60,40$ $60,92$

Consider the following chain of matrices $A_{1}$ to $A_{4}$ having dimensions given below$A_{1}\rightarrow 2\times 3$$A_{2}\rightarrow 3\times 5$$A_{3}\rightarrow 5\times...

firki lama

1.2k views

firki lama asked Dec 29, 2016

0 votes

0 answers

120

Virtual Gate Test Series: Algorithms - NP Class

firki lama

228 views

firki lama asked Dec 29, 2016

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