Recent questions tagged virtual-memory / GATE Overflow for GATE CSE

32 votes

2 answers

271

GATE CSE 2009 | Question: 10
The essential content(s) in each entry of a page table is / are Virtual page number Page frame number Both virtual page number and page frame number Access right information

The essential content(s) in each entry of a page table is / areVirtual page numberPage frame numberBoth virtual page number and page frame numberAccess right information

Kathleen

11.7k views

Kathleen asked Sep 22, 2014

66 votes

9 answers

272

GATE CSE 2004 | Question: 21, ISRO2007-44
The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined by the instruction set architecture page size number of processes in memory physical memory size

The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined bythe instruction set architecturepage sizenum...

Kathleen

23.9k views

Kathleen asked Sep 18, 2014

27 votes

6 answers

273

GATE CSE 2003 | Question: 26
In a system with $\text{32 bit}$ virtual addresses and $\text{1 KB}$ page size, use of one-level page tables for virtual to physical address translation is not practical because of the large amount of internal ... large amount of external fragmentation the large memory overhead in maintaining page tables the large computation overhead in the translation process

In a system with $\text{32 bit}$ virtual addresses and $\text{1 KB}$ page size, use of one-level page tables for virtual to physical address translation is not practical ...

Kathleen

15.4k views

Kathleen asked Sep 16, 2014

37 votes

3 answers

274

GATE CSE 2002 | Question: 19
A computer uses $32-bit$ virtual address, and $32-bit$ physical address. The physical memory is byte addressable, and the page size is $4$ $\text{Kbytes}.$ It is decided to use two level page tables to translate from virtual address ... that can be contained in each page? How many bits are available for storing protection and other information in each page table entry?

A computer uses $32-bit$ virtual address, and $32-bit$ physical address. The physical memory is byte addressable, and the page size is $4$ $\text{Kbytes}.$ It is decided...

Kathleen

14.3k views

Kathleen asked Sep 15, 2014

121 votes

15 answers

275

GATE CSE 2003 | Question: 78
A processor uses $2-level$ page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both $32$ bits wide. The memory is byte addressable. For virtual to physical address translation, the ... virtual address is approximately (to the nearest $0.5$ ns) $1.5$ ns $2$ ns $3$ ns $4$ ns

A processor uses $2-level$ page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addres...

gatecse

50.0k views

gatecse asked Sep 15, 2014

1 votes

2 answers

276

Page tables are stored in memory , which has access time of 100 ns.
Page tables are stored in memory , which has access time of 100 ns. The TLB holding 8 page table entries, has an access time of 10 ns. Using execution of process , it is found that 85 % of the time, a required page table ... requires 2 memory accesses and TLB requires one memory access. A) 38120 ns B) 40000 ns C) 40120 ns D) None

Page tables are stored in memory , which has access time of 100 ns. The TLB holding 8 page table entries, has an access time of 10 ns. Using execution of process , it is ...

gatecse

5.0k views

gatecse asked Sep 15, 2014

49 votes

4 answers

277

GATE CSE 2001 | Question: 2.21
Consider a machine with $64$ MB physical memory and a $32$-bit virtual address space. If the page size s $4$ KB, what is the approximate size of the page table? $\text{16 MB}$ $\text{8 MB}$ $\text{2 MB}$ $\text{24 MB}$

Consider a machine with $64$ MB physical memory and a $32$-bit virtual address space. If the page size s $4$ KB, what is the approximate size of the page table?$\text{16 ...

Kathleen

66.2k views

Kathleen asked Sep 14, 2014

37 votes

3 answers

278

GATE CSE 2001 | Question: 1.20
Where does the swap space reside? RAM Disk ROM On-chip cache

Where does the swap space reside?RAMDiskROMOn-chip cache

Kathleen

12.7k views

Kathleen asked Sep 14, 2014

47 votes

2 answers

279

GATE CSE 2001 | Question: 1.8
Which of the following statements is false? Virtual memory implements the translation of a program's address space into physical memory address space Virtual memory allows each program to exceed the size of the primary memory Virtual memory increases the degree of multiprogramming Virtual memory reduces the context switching overhead

Which of the following statements is false?Virtual memory implements the translation of a program's address space into physical memory address spaceVirtual memory allows ...

Kathleen

21.5k views

Kathleen asked Sep 14, 2014

35 votes

5 answers

280

GATE CSE 2000 | Question: 2.22
Suppose the time to service a page fault is on the average $10$ milliseconds, while a memory access takes $1$ microsecond. Then a $99.99\%$ hit ratio results in average memory access time of $1.9999$ milliseconds $1$ millisecond $9.999$ microseconds $1.9999$ microseconds

Suppose the time to service a page fault is on the average $10$ milliseconds, while a memory access takes $1$ microsecond. Then a $99.99\%$ hit ratio results in average m...

Kathleen

18.3k views

Kathleen asked Sep 14, 2014

43 votes

4 answers

281

GATE CSE 1991 | Question: 03-xi
Indicate all the false statements from the statements given below: The amount of virtual memory available is limited by the availability of the secondary memory Any implementation of a critical section requires the use of an indivisible machine- ... for some type of programs. The best fit techniques for memory allocation ensures that memory will never be fragmented.

Indicate all the false statements from the statements given below:The amount of virtual memory available is limited by the availability of the secondary memoryAny impleme...

Kathleen

10.7k views

Kathleen asked Sep 12, 2014

36 votes

4 answers

282

GATE CSE 1991 | Question: 03,iii
The total size of address space in a virtual memory system is limited by: the length of MAR the available secondary storage the available main memory all of the above none of the above

The total size of address space in a virtual memory system is limited by:the length of MARthe available secondary storagethe available main memoryall of the abovenone of ...

Kathleen

12.5k views

Kathleen asked Sep 12, 2014

277 votes

14 answers

283

GATE CSE 2008 | Question: 67
A processor uses $36$ bit physical address and $32$ bit virtual addresses, with a page frame size of $4$ Kbytes. Each page table entry is of size $4$ bytes. A three level page table is used for virtual to physical address translation, where the virtual address is used as ... tables are respectively $\text{20,20,20}$ $\text{24,24,24}$ $\text{24,24,20}$ $\text{25,25,24}$

A processor uses $36$ bit physical address and $32$ bit virtual addresses, with a page frame size of $4$ Kbytes. Each page table entry is of size $4$ bytes. A three level...

Kathleen

76.5k views

Kathleen asked Sep 12, 2014

51 votes

7 answers

284

GATE CSE 2008 | Question: 38
In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed is: before effective address calculation has started during effective address calculation after effective address calculation has completed after data cache lookup has completed

In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed is:before effective address calculation has starteddur...

Kathleen

19.4k views

Kathleen asked Sep 12, 2014

106 votes

7 answers

285

GATE CSE 2013 | Question: 52
A computer uses $46\text{-bit}$ virtual address, $32\text{-bit}$ physical address, and a three-level paged page table organization. The page table base register stores the base address of the first-level table $\text{(T1)}$ ... is $64$ bytes. What is the size of a page in $\textsf{KB}$ in this computer? $2$ $4$ $8$ $16$

A computer uses $46\text{-bit}$ virtual address, $32\text{-bit}$ physical address, and a three–level paged page table organization. The page table base register stores ...

kanikool

37.5k views

kanikool asked Sep 10, 2014

129 votes

19 answers

286

GATE CSE 2004 | Question: 47
Consider a system with a two-level paging scheme in which a regular memory access takes $150$ $nanoseconds$, and servicing a page fault takes $8$ $milliseconds$. An average instruction takes $100$ nanoseconds of CPU time, and two memory accesses. ... execution time? $\text{645 nanoseconds}$ $\text{1050 nanoseconds}$ $\text{1215 nanoseconds}$ $\text{1230 nanoseconds}$

Consider a system with a two-level paging scheme in which a regular memory access takes $150$ $nanoseconds$, and servicing a page fault takes $8$ $milliseconds$. An avera...

gatecse

63.7k views

gatecse asked Sep 5, 2014

tags	tag:apple
author	user:martin
title	title:apple
content	content:apple
exclude	-tag:apple
force match	+apple
views	views:100
score	score:10
answers	answers:2
is accepted	isaccepted:true
is closed	isclosed:true