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Boolean algebra. Combinational and sequential circuits. Minimization. Number representations and computer arithmetic (fixed and floating point)

$$\scriptsize{\overset{{\large{\textbf{Mark Distribution in Previous GATE}}}}{\begin{array}{|c|c|c|c|c|c|c|c|}\hline
\textbf{Year}& \textbf{2022} & \textbf{2021-1}&\textbf{2021-2}&\textbf{2020}&\textbf{2019}&\textbf{2018}&\textbf{2017-1}&\textbf{2017-2}&\textbf{2016-1}&\textbf{2016-2}&\textbf{Minimum}&\textbf{Average}&\textbf{Maximum}
\\\hline\textbf{1 Mark Count} & 1&2&3&2&4&2&3&2&3&3&1&2.5&4
\\\hline\textbf{2 Marks Count} & 2&2&2&1&2&2&0&4&2&0&0&1.7&4
\\\hline\textbf{Total Marks} & 5&6&7&4&8&6&3&10&7&3&\bf{3}&\bf{5.9}&\bf{10}\\\hline
\end{array}}}$$

Questions without answers in Digital Logic

1 votes
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2
In a ripple counter, the state whose output has a frequency equal to 1/8th that of the clock signal applied to the first stage, also has an output periodicity equal to 1/...
0 votes
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3
I am unable to understand the language of the question , can someone help me??
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4
0 votes
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7
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13
Here clr is active low that means 0 then it will clear to 0. Then (Q2.Q0)' =0 or Q2=1 and Q0=1 then clr works. Then it will contain only 1 state. Right?? But answer is ...
0 votes
0 answers
14
0 votes
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15
ANALYZE THE CIRCUIT GIVEN ABOVE.
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16
How many decade counters are necessary to implement a divide by 100 counter and divide by 10000 counter?
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18
0 votes
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19
0 votes
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22
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24
0 votes
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25
Construct a BCD-to-excess-3-code converter with a 4-bit adder. Remember that the excess-3 code digit is obtained by adding three to the corresponding BCD digit. What mus...
0 votes
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26
0 votes
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27
The function f(A,B,C,D)=Ʃ(3,4,5,7,9,13,14,15) is realized with the following digital logic block circuit. Each digital logic block is implemented with minimum number of ...
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