Unanswered Previous GATE Questions / GATE Overflow for GATE CSE

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1

GATE CSE 2024 | Set 2 | Question: 48
A non-pipelined instruction execution unit operating at $2 \mathrm{GHz}$ takes an average of $6$ cycles to execute an instruction of a program $\text{P}$. The unit is then redesigned to operate on a $5$ ... hazards. The speedup (rounded off to one decimal place) obtained by the pipelined design over the non-pipelined design is ____________.

A non-pipelined instruction execution unit operating at $2 \mathrm{GHz}$ takes an average of $6$ cycles to execute an instruction of a program $\text{P}$. The unit is the...

Arjun

1.7k views

Arjun asked Feb 16

0 votes

0 answers

2

How is mtech from IIT kanpur cybersecurity in terms of placements and will i get chance for internship? My gate rank in 271 in GATE CSE 2023 , will i be able to get it or should i look for mtech in CSE from other colleges? Till which COAP round should i wait?

prakhars shankar

676 views

prakhars shankar asked May 2, 2023

0 votes

0 answers

3

GATE CSE 1995 | Question: 17b
Consider a CRT display that has a text mode display format of $80×25$ characters with a $9×12$ character cell. What is the size of the video buffer RAM for the display to be used in monochrome ($1$ bit per pixel) graphics mode

Consider a CRT display that has a text mode display format of $80×25$ characters with a $9×12$ character cell. What is the size of the video buffer RAM for the display ...

Arjun

1.4k views

Arjun asked Jul 14, 2019

5 votes

0 answers

4

How to prepare for GATE CSE 2019 along with a job ? Is it possible to prepare myself without any coaching?

Hi , I am working in wipro since 18 months for now. I appeared for GATE without preparation in 2016 and 2018 and couldn't even qualify . Needless to say , I hate my job...

ankit aingh

3.9k views

ankit aingh asked Apr 28, 2018

2 votes

0 answers

5

GATE CSE 2017 Set 1 | Question: 15 with modification
A sender S sends a message m to receiver R, in which the message digest is digitally signed by S with its private key. In this scenario, one or more of the following security violations can take place. (I) S can launch a birthday attack to ... is case 1 and then arrived at the answer as option B what if it was case 2 the answer is still the same?

A sender S sends a message m to receiver R, in which the message digest is digitally signed by S with its private key. In this scenario, one or more of the following secu...

A_i_$_h

512 views

A_i_$_h asked Oct 24, 2017

5 votes

0 answers

6

GATE CSE 2017 Set 1 | Question: 10
https://gateoverflow.in/118290/gate2017-1-10 There is a confusion between option B and C It cannot be option B because the variable c has no power , its always taken as 1 which is not what the grammar says Option C - should be the ans i feel please help

https://gateoverflow.in/118290/gate2017-1-10There is a confusion between option B and CIt cannot be option B because the variable c has no power , its always taken as 1 w...

A_i_$_h

561 views

A_i_$_h asked Oct 23, 2017

1 votes

0 answers

7

GATE CSE 1988 | Question: 17i-ii-iii
The following table gives the cost of transporting one tonne of goods from the origins A, B, C to the destinations F, G, H. Also shown are the availabilities of the goods at the origins and the requirements at the destinations. The ... . For the solution of (ii) above, calculate the values of the duals and determine whether this is an optimal solution.

The following table gives the cost of transporting one tonne of goods from the origins A, B, C to the destinations F, G, H. Also shown are the availabilities of the goods...

go_editor

603 views

go_editor asked Dec 20, 2016

1 votes

0 answers

8

GATE CSE 1988 | Question: 16ii-iii
If $x \| \underline{x} \| \infty = 1< i^{max} < n \: \: max \: \: ( \mid x1 \mid ) $ for the vector $\underline{x} = (x1, x2 \dots x_n)$ ... known property of this norm. Although this norm is very easy to calculate for any matrix, explain why the condition number is difficult (i.e. expensive) to calculate.

If $x \| \underline{x} \| \infty = 1< i^{max} < n \: \: max \: \: ( \mid x1 \mid ) $ for the vector $\underline{x} = (x1, x2 \dots x_n)$ and $\| A \| \infty = x^{Sup} \fr...

go_editor

753 views

go_editor asked Dec 20, 2016

2 votes

0 answers

9

GATE CSE 1988 | Question: 13ib
Verify whether the following mapping is a homomorphism. If so, determine its kernel. $\overline{G}=G$

Verify whether the following mapping is a homomorphism. If so, determine its kernel.$\overline{G}=G$

go_editor

485 views

go_editor asked Dec 20, 2016

1 votes

0 answers

10

GATE CSE 1988 | Question: 13ia
Verify whether the following mapping is a homomorphism. If so, determine its kernel. $G$ is the group of non zero real numbers under multiplication.

Verify whether the following mapping is a homomorphism. If so, determine its kernel.$G$ is the group of non zero real numbers under multiplication.

go_editor

453 views

go_editor asked Dec 20, 2016

1 votes

0 answers

11

GATE CSE 1988 | Question: 9ii
The code for the implementation of a sub-routine to convert positive numeric data from binary to appropriate character string in a $PDP-11$ like machine has been given below Note-that $SP$ is the stack pointer and $R_i$ represents $i^{th}$ ...

The code for the implementation of a sub-routine to convert positive numeric data from binary to appropriate character string in a $PDP-11$ like machine has been given be...

go_editor

510 views

go_editor asked Dec 19, 2016

1 votes

0 answers

12

GATE CSE 1988 | Question: 8iv
Consider the following Ada program: Procedure P is BAD-FORMAT: exception Procedure Q is begin ... if S/='b' then raise BAD-FORMAT end if; ... end Q; Procedure R is begin Q; exception when BAD-Format => ... handler body 1 end R; begin ... when BAD-FORMAT => ... handler body 2 end P; Under what conditions are the two handler bodies $1$ and $2$ executed?

Consider the following Ada program:Procedure P is BAD-FORMAT: exception Procedure Q is begin ... if S/='b' then raise BAD-FORMAT end if; ... end Q; Procedure R is begin Q...

go_editor

503 views

go_editor asked Dec 19, 2016

0 votes

0 answers

13

GATE CSE 1988 | Question: 5ii
Briefly explain the term “Configuring a programmable peripheral chip”.

Briefly explain the term “Configuring a programmable peripheral chip”.

go_editor

272 views

go_editor asked Dec 19, 2016

1 votes

0 answers

14

GATE CSE 1988 | Question: 5i
A ROM has the following time parameters: Maximum Address to valid Data Output delay $= 30$ n sec. Maximum Chip Select to valid Data Output delay $= 20$ n sec. Maximum Data Hold time (after address change or after chip deselect) $= 10$ n ... negligible What is the maximum rate at which a CPU can continuously read data from this ROM? (Show your calculations step-by-step)

A ROM has the following time parameters:Maximum Address to valid Data Output delay $= 30$ n sec.Maximum Chip Select to valid Data Output delay $= 20$ n sec.Maximum Data H...

go_editor

522 views

go_editor asked Dec 19, 2016

1 votes

0 answers

15

GATE CSE 1988 | Question: 4i
An $8$-bit data path is to be set up using two $4$-bit ALU's and suitable multiplexers. The ALU's accept two operands $A$ and $B$ on which a total of $16$ operations can be performed. The operand $A$ is from one of two ... a bus. List the data path control signals, and estimate the minimum width of a signal microcode word needed for the generation of these signals.

An $8$-bit data path is to be set up using two $4$-bit ALU’s and suitable multiplexers. The ALU’s accept two operands $A$ and $B$ on which a total of $16$ operations ...

go_editor

537 views

go_editor asked Dec 19, 2016

0 votes

0 answers

16

GATE CSE 1988 | Question: 2xiv
Which of the following features are available in Ada? procedures, monitors, packages, common statement, goto statement, generic unit tasks, backtracking, recursion, exceptions, pragmas, classes.

Which of the following features are available in Ada?procedures, monitors, packages, common statement, goto statement, generic unit tasks, backtracking, recursion, except...

go_editor

489 views

go_editor asked Dec 19, 2016

2 votes

0 answers

17

GATE CSE 1988 | Question: 2xi
A modern day machine typically has an atomic TEST AND SET instruction. Why?

A modern day machine typically has an atomic TEST AND SET instruction. Why?

go_editor

673 views

go_editor asked Dec 18, 2016

0 votes

0 answers

18

GATE CSE 1989 | Question: 12b
Consider a database with the following three relations: CREDITS (STUDENT; COURSE) OFFERS (TEACHER; COURSE) BELONGS (TEACHER; DEPARTMENT) Given below is a code in query language QUEL. Describe in one English sentence the query posed by the given QUEL program. range of s is ... range of e2 is LIST2 range of e3 is LIST3 retrieve(E1.I) where e1.I=e2.I and where e1.I=e3.I

Consider a database with the following three relations:CREDITS (STUDENT; COURSE)OFFERS (TEACHER; COURSE)BELONGS (TEACHER; DEPARTMENT)Given below is a code in query langua...

makhdoom ghaya

530 views

makhdoom ghaya asked Dec 15, 2016

0 votes

0 answers

19

GATE CSE 1988 | Question: 2iv
Give one property of the field of real numbers which no longer holds when we compute using finite-precision floating point numbers.

Give one property of the field of real numbers which no longer holds when we compute using finite-precision floating point numbers.

go_editor

496 views

go_editor asked Dec 11, 2016

1 votes

0 answers

20

GATE CSE 1988 | Question: 2i
If the transportation problem is solved using some version of the simplex algorithm, under what condition will the solution always have integer values?

If the transportation problem is solved using some version of the simplex algorithm, under what condition will the solution always have integer values?

go_editor

391 views

go_editor asked Dec 11, 2016

1 votes

0 answers

21

GATE CSE 1988 | Question: 1vi
An $8212$ in handshake mode of implementation is used in a device controller of a microprocessor-based system. The $8212$ control signals used for the purpose of handshaking are _________ at the microprocessor end, and ________ at the device end.

An $8212$ in handshake mode of implementation is used in a device controller of a microprocessor-based system. The $8212$ control signals used for the purpose of handshak...

go_editor

423 views

go_editor asked Dec 10, 2016

0 votes

0 answers

22

GATE CSE 1988 | Question: 1ii
Assuming ideal diodes, the voltage at $V_0$ for circuit in the below figure is _______ (Express the voltage in terms of x, y and z)

Assuming ideal diodes, the voltage at $V_0$ for circuit in the below figure is _______ (Express the voltage in terms of x, y and z)

go_editor

415 views

go_editor asked Dec 10, 2016

0 votes

0 answers

23

GATE CSE 1989 | Question: 7
An 8085-based microcomputer consisting of 16 kbytes of ROM, 16kbytes of RAM and four 8-bit I/O ports is to be designed using RAM and ROM chips each of 2 kbytes capacity. The chip to be used for I/O ports realization consists of two 8-bit ports ... memory address space. The I/O locations are to occupy lower order I/O address space. Give memory map and I/O address map.

An 8085-based microcomputer consisting of 16 kbytes of ROM, 16kbytes of RAM and four 8-bit I/O ports is to be designed using RAM and ROM chips each of 2 kbytes capacity. ...

makhdoom ghaya

516 views

makhdoom ghaya asked Dec 1, 2016

1 votes

0 answers

24

GATE CSE 1989 | Question: 6b
In a certain computer system, there is special instruction implemented to call subroutines. The instruction is JSR Reg.Sub Microsequence: Temp ← Sub SP ← (SP)+2 (SP) ← (Reg) Reg ← (PC) PC ← (Temp) Where Temp is an internal CPU ... would implement co-routine using the JSR instruction. Show the control flow diagram and the contents of the stack before and after the call.

In a certain computer system, there is special instruction implemented to call subroutines. The instruction isJSR Reg.Sub Microsequence: Temp ← Sub SP ← (SP)+2 (SP) �...

makhdoom ghaya

465 views

makhdoom ghaya asked Dec 1, 2016

6 votes

0 answers

25

GATE CSE 1989 | Question: 5b
It is required to implement a stack using bidirectional shift registers providing stack underflow and overflow detection capability. How many shift registers are needed for a stack capacity of $nk$-bit words? Show the schematic diagram of the implementation, clearly indicating all the data and control lines.

It is required to implement a stack using bidirectional shift registers providing stack underflow and overflow detection capability.How many shift registers are needed fo...

makhdoom ghaya

617 views

makhdoom ghaya asked Nov 30, 2016

0 votes

0 answers

26

GATE CSE 1989 | Question: 4-xiii
Provide short answers to the following questions: Consider the following sequence of UNIX commands: grep main a.c b.c c.c > grepout & wc < grepout & rm grepout & Why is this not equivalent to the following? grep main a.c.b.c c.c | wc

Provide short answers to the following questions:Consider the following sequence of UNIX commands:grep main a.c b.c c.c grepout & wc < grepout & rm grepout &Why is this ...

makhdoom ghaya

534 views

makhdoom ghaya asked Nov 30, 2016

3 votes

0 answers

27

GATE CSE 1990 | Question: 15b
Complete the following production rules which generate the language:$L= \left\{a^{n} b^{n} c^{n}\mid a, b, c \in \Sigma \right\}$ where variables $R$ and $Q$ ... $Q \rightarrow R'c$ $cR' \rightarrow ...$ $bR' \rightarrow ...$ $aR' \rightarrow a...$

Complete the following production rules which generate the language:$$L= \left\{a^{n} b^{n} c^{n}\mid a, b, c \in \Sigma \right\}$$ where variables $R$ and $Q$ are used t...

makhdoom ghaya

710 views

makhdoom ghaya asked Nov 26, 2016

1 votes

0 answers

28

GATE CSE 1990 | Question: 14
The following algorithm (written in pseudo-pascal) work on an undirected graph $G$ program Explore (G) procedure Visit (u) begin if Adj (u) is not empty {comment:Adj (u) is the list of edges incident to u} then begin Select an edge from ... that each vertex can be accessed and removed from LIST in constant time. Also, show that all edges of the graph are traversed.

The following algorithm (written in pseudo-pascal) work on an undirected graph $G$program Explore (G) procedure Visit (u) begin if Adj (u) is not empty {comment:Adj (u) i...

makhdoom ghaya

644 views

makhdoom ghaya asked Nov 25, 2016

1 votes

0 answers

29

GATE CSE 1990 | Question: 12a
Consider the following instance of the $0 -1$ Knapsack problem: $\max\; 6X_{1} + 11X_{2} + 16X_{3} + 21X_{4} + 26X_{5}$ Subject to $4X_{1} + 8X_{2} + 12X_{3} + 16X_{4} + 20 X_{5} < 32$ and $X_{i}=0$ ... nodes in the tree in the order in which they are expanded and for each node show the bound on the partial solutions and the decision which leads to that node.

Consider the following instance of the $0 -1$ Knapsack problem:$\max\; 6X_{1} + 11X_{2} + 16X_{3} + 21X_{4} + 26X_{5}$Subject to $4X_{1} + 8X_{2} + 12X_{3} + 16X_{4} + 20...

makhdoom ghaya

1.0k views

makhdoom ghaya asked Nov 25, 2016

2 votes

0 answers

30

GATE CSE 1990 | Question: 9a
Assume that an instruction test-and-set (TS) has been provided in a machine whose function is as follows: 'the left most bit of the one byte operand is checked and accordingly the condition code (CC) is set to $1$ or $0$. After checking and setting the condition code, implement a critical region using this instruction.

Assume that an instruction test-and-set (TS) has been provided in a machine whose function is as follows: 'the left most bit of the one byte operand is checked and accord...

makhdoom ghaya

898 views

makhdoom ghaya asked Nov 24, 2016

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