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Recent activity by Badayayash
2
answers
1
Madeeasy Test Series
Three peoples have 32,72,and 98, respectively. If they pool their money then redistribute it among themselves. What is the maximum possible value for the median amount of money?
answered
in
Quantitative Aptitude
Apr 16, 2019
266
views
quantitative-aptitude
2
answers
2
DBMS Korth Edition 6 Exercise 2 Question 13 (Page No. 55)
Consider the bank database. Give an expression in the relational algebra for each of the following queries: a. Find all loan numbers with a loan value greater than ... borrower (customer name, loan number) account (account number, branch name, balance) depositor (customer name, account number)
commented
in
Databases
Apr 2, 2019
1.4k
views
databases
korth-edition6
relational-model
relational-algebra
0
answers
3
GATE Overflow | Mock GATE | Test 1 | Question: 55
Which of the following is/are true regarding Weak Entity Sets? (P) An entity set that does not have a primary key is referred to as a weak entity set. (Q) The existence of a weak entity set depends on the existence of a identifying entity set. (R) ... . Only R, S and T are true All are true Only Q, R and S are true Only P, R and S are true
commented
in
Databases
Feb 2, 2019
543
views
go-mockgate-1
er-diagram
databases
2
answers
4
GATE Overflow | Mock GATE | Test 1 | Question: 59
Assume the initial values of $K0$, $Q_0$ and $Q_1$ to be $1$. Which of the following state transition tables correctly correspond to the circuit given above? (Note: $Q_{kN}$ and $Q_{kN+1}$ ...
answered
in
Digital Logic
Feb 2, 2019
552
views
go-mockgate-1
digital-circuits
circuit-output
digital-logic
1
answer
5
made easy test series
answered
in
Databases
Jan 31, 2019
296
views
databases
sql
3
answers
6
GATE CSE 2015 Set 1 | Question: 8
For computer based on three-address instruction formats, each address field can be used to specify which of the following: (S1) A memory operand (S2) A processor register (S3) An implied accumulator register Either $S1$ or $S2$ Either $S2$ or $S3$ Only $S2$ and $S3$ All of $S1$, $S2$ and $S3$
commented
in
Compiler Design
Jan 30, 2019
16.0k
views
gatecse-2015-set1
compiler-design
intermediate-code
normal
0
answers
7
Problem in Understanding the DFA, Need Help
I am reading Hopcroft Ullman - Automata Theory(2nd Edition). In page Number 65 (Red Underline part in the given Image); I understand when i=1 but unable to understand when i>1 then how the Accepting and Non-accepting State are same. My ... Accepting and Non-Accepting; it may be Accepting and Non-Accepting ". Please help me............ Thanks
commented
in
Theory of Computation
Jan 29, 2019
183
views
theory-of-computation
finite-automata
3
answers
8
MadeEasy Subject Test 2019: Combinatory - Permutations And Combinations
Q.The number of ways, we can arrange 5 books in 3 shelves ________.
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in
Combinatory
Jan 29, 2019
2.3k
views
discrete-mathematics
combinatory
made-easy-test-series
1
answer
9
Vertex connectivity
What is the vertex connectivity for a complete graph k4,k5,k6???
commented
in
Mathematical Logic
Jan 29, 2019
1.4k
views
0
answers
10
MadeEasy Full Length Test 2019: Computer Networks - Sliding Window
A 1 Mbps satellite link connects two ground stations. The altitude of the satellite is 6000 km and speed of the signal is 3 10^8 m/s. What should be the packet size for a channel utilization of 50% ... packets are negligible in size and that there are no errors during communication. 81031 Bytes 83101 Bytes 801301 Bytes 81301 Bytes
commented
in
Computer Networks
Jan 28, 2019
611
views
sliding-window
computer-networks
made-easy-test-series
2
answers
11
ISRO-2013-62
A particular parallel program computation requires $100$ seconds when executed on a single CPU. If $20$% of this computation is strictly sequential, then theoretically the best possible elapsed times for this program running on $2$ CPUs and $4$ CPUs respectively are $55$ and $45$ seconds $80$ and $20$ seconds $75$ and $25$ seconds $60$ and $40$ seconds
commented
in
Operating System
Jan 28, 2019
4.5k
views
isro2013
operating-system
concurrency
1
answer
12
MadeEasy Full Length Test 2019: CO & Architecture - Speedup
answered
in
CO and Architecture
Jan 28, 2019
313
views
co-and-architecture
speedup
made-easy-test-series
1
answer
13
boolean expressions
The maximum number of boolean expressions that can be formed for the function f(x,y,z) satisfying the relation f(x',y,z')=f(x,y,z) is
commented
in
Digital Logic
Jan 28, 2019
1.3k
views
boolean-algebra
digital-logic
made-easy-test-series
0
answers
14
MadeEasy Full Length Test 2019: Programming & DS - DS
Q.Consider a 2 dimensional array A[40 ... 95, 40 ... 95] in lower triangular matrix representation. If the array is implemented in the memory in the form of row major order and base address of the array is 1000, then the address of A[66][50] will be ________.
commented
in
Programming
Jan 27, 2019
474
views
data-structures
array
made-easy-test-series
1
answer
15
ME_FULL LENGTH
let x be an integer which can take a value of either 0 or 1 .then the statement (x=0) ? x=1: x=0 x=x+1 x=1-x x=x-1 none of these according to me x=0 is always going to be true so that expression will evaluate to x=1 which is not matching with any of the option so answer should be D none of these but in answer they ‘ve given B as true please confirm it.
answered
in
Programming
Jan 27, 2019
208
views
1
answer
16
MadeEasy Test Series: Set Thoery & Algebra - Partial Order
Let Q denote the set of rational numbers and S = {x | x belongs N ; N; x>=10} Consider the Following POSETs I. (Q ∩ [0, 1], ≤) II. (S, ≤) Which of the above POSETs are well ordered?
commented
in
Set Theory & Algebra
Jan 26, 2019
650
views
set-theory&algebra
partial-order
made-easy-test-series
3
answers
17
MadeEasy Subject Test: CO & Architecture - Cache Memory
A cache memory is 30 times faster than main memory (MM) and 50% of the time cache is referred for the execution of instruction. The performance is gained by introducing this cache is ________. What I did EMAT = 0.5(M/30)+0.5(M/30+M) = 32M/60 speed up= (M)/32M/60) =60/32=1.875 answer given is 1.90-1.97 (using amdhal’s law)
answered
in
CO and Architecture
Jan 26, 2019
412
views
made-easy-test-series
co-and-architecture
cache-memory
amdhals-law
speedup
1
answer
18
BINARY TREE
A rooted tree with 8 nodes has its nodes [1.....8] in preorder.When the tree is traversed in postorder.....nodes visited are {3,5,4,2,7,8,6,1}. Draw a tree for it. How to solve .....someone please explain?
answered
in
DS
Jan 24, 2019
413
views
binary-tree
data-structures
0
answers
19
madeeasy test series
Q.Consider the following grammar S → Bb | cAb | d B → ab | c A → e which of the following is correct about the above grammer (A) Only CLR(1) (B) LL(1) and CLR(1) (C) LALR(1) and CLR(1) (D) Only LL(1)
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in
Compiler Design
Jan 22, 2019
162
views
0
answers
20
MadeEasy Test Series : Computer Networks - Sliding Window
Q.Consider a network connecting two systems connected 2000 Km apart. The band width of the network is 70 Mbps. The propagation speed of the signal is 2 10 m/sec and average size of the frame is 10 KB. Assume processing delays at nodes ... x 10^3 bits , how? it should be multiplied with 8 to convert frame to bits. correct me if i m wrong.
commented
in
Computer Networks
Jan 22, 2019
375
views
computer-networks
sliding-window
made-easy-test-series
3
answers
21
MadeEasy Test Series 2019: Databases - Transaction And Concurrency
Consider the following schedule $\text{S : r2(A), w1(B), w1(C), R3(B), r2(B), r1(A), commit_1, r2(C), commit_2, w3(A), commit_3 }$ Consider the following statements : S1 : Schedule(S) is conflict ... ) is strict recoverable schedule. S4 : Schedule(S) is allowed by strict 2PL. How many above statements true about schedule(S) ?
commented
in
Databases
Jan 21, 2019
2.5k
views
transaction-and-concurrency
made-easy-test-series
0
answers
22
MadeEasy Test Series 2019: CO & Architecture - Machine Instruction
Q.A stack based CPU executes the instruction.Memory location 500 contains 0x88 and memory location 700 contains 0x37.The stack pointer is at 0x003F. The instructions are as follows: I1:PUSH 500 I2:PUSH 700 I3:ADD ... after execution instructions c)Memory location 600 contains 0xBF after execution instructions d)Both (a) and (c)
commented
in
CO and Architecture
Jan 21, 2019
1.2k
views
co-and-architecture
machine-instructions
made-easy-test-series
0
answers
23
MadeEasy Test Series 2019 Query
Is anyone giving made easy test series for 2019 gate i would like to discuss some questions. because i feel like there are many questions in the test series which are wrong and they don’t respond.
commented
in
GATE
Jan 20, 2019
245
views
made-easy-test-series
see-later
1
answer
24
Self doubt
What data this query will return please explain someone.. and how we approach this type of query
answered
in
Databases
Jan 20, 2019
319
views
1
answer
25
Parsing LALR
If LALR(1) parser have shift reduce conflict then CLR(1) parser must have shift reduce conflict, why?
commented
in
Compiler Design
Jan 20, 2019
1.2k
views
compiler-design
lr-parser
14
answers
26
GATE CSE 2014 Set 1 | Question: 39
The minimum number of comparisons required to find the minimum and the maximum of $100$ numbers is ________
answered
in
Algorithms
Jan 10, 2019
45.5k
views
gatecse-2014-set1
algorithms
numerical-answers
normal
maximum-minimum
3
answers
27
GATE CSE 2007 | Question: 4
Let $G$ be the non-planar graph with the minimum possible number of edges. Then $G$ has 9 edges and 5 vertices 9 edges and 6 vertices 10 edges and 5 vertices 10 edges and 6 vertices
answered
in
Graph Theory
Dec 31, 2018
8.3k
views
gatecse-2007
graph-theory
normal
out-of-syllabus-now
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