Recent activity by Codered03 / GATE Overflow for GATE CSE

6 answers

1

GATE CSE 2022 | Question: 41
Consider the following recurrence: $\begin{array}{} f(1) & = & 1; \\ f(2n) & = & 2f(n) - 1, & \; \text{for}\; n \geq 1; \\ f(2n+1) & = & 2f(n) + 1, & \; \text{for}\; n \geq 1. \end{array}$ Then, which of the following statements is/are $\text{TRUE}?$ ... $f(2^{n}) = 1$ $f(5 \cdot 2^{n}) = 2^{n+1} + 1$ $f(2^{n} + 1) = 2^{n} + 1$

Consider the following recurrence:$$\begin{array}{} f(1) & = & 1; \\ f(2n) & = & 2f(n) – 1, & \; \text{for}\; n \geq 1; \\ f(2n+1) & = & 2f(n) + 1, & \; \text...

7.8k views

commented Feb 16, 2022

1 answer

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GATE CSE 2022 | Question: 14
Let $\text{WB}$ and $\text{WT}$ be two set associative cache organizations that use $\text{LRU}$ algorithm for cache block replacement. $\text{WB}$ is a write back cache and $\text{WT}$ ... cache to main memory. A read miss in $\text{WB}$ will never lead to eviction of a dirty block from $\text{WB}.$

Let $\text{WB}$ and $\text{WT}$ be two set associative cache organizations that use $\text{LRU}$ algorithm for cache block replacement. $\text{WB}$ is a write back cache ...

7.8k views

commented Feb 15, 2022

1 answer

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GATE Overflow Test Series | Mixed Subjects | Test 4 | Question: 11
Which of the following are possible with regard to processes in OS? (Mark all the appropriate choices) A child process running itself even when its parent process has finished execution. A process having an entry ... A process changing its parent using appropriate system calls. A process having multiple parent processes at any time.

Which of the following are possible with regard to processes in OS? (Mark all the appropriate choices)A child process running itself even when its parent process has fini...

128 views

commented Jan 31, 2022

1 answer

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GATE Overflow Test Series | Mixed Subjects | Test 2 | Question: 10
Which of the following statements is/are TRUE? (Mark all the appropriate choices) The XOR function is the mathematical equivalent of binary addition The AND function is the mathematical equivalent of binary ... is the mathematical equivalent of binary addition The OR function is the mathematical equivalent of binary addition

Which of the following statements is/are TRUE? (Mark all the appropriate choices)The XOR function is the mathematical equivalent of binary additionThe AND function is the...

118 views

commented Jan 30, 2022

1 answer

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GATE Overflow | Mock GATE | Test 1 | Question: 47
Which of the following statements is/are correct with respect to Djikstra Algorithm? (P) It always works perfectly for graphs with negative weight edges. (Q) It does not work perfectly for graphs with negative weight cycles. (R) It may or may not work for graphs ... , S, T and U are correct Only Q, R, T are correct Only Q, R, S, T and U are correct

Which of the following statements is/are correct with respect to Djikstra Algorithm?(P) It always works perfectly for graphs with negative weight edges.(Q) It does not wo...

1.6k views

commented Jan 26, 2022

4 answers

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GATE Overflow Test Series | Mock GATE | Test 2 | Question: 16
Statement $1$: The $p-$persistent algorithm with binary exponential backoff is efficient over a wide range of loads. Statement $2$ : An algorithm is needed with CSMA to specify what a station should do if the medium is found ... true but statement $2$ is false Both statements are false Statement $2$ is true but statement $1$ is false

Statement $1$: The $p-$persistent algorithm with binary exponential backoff is efficient over a wide range of loads.Statement $2$ : An algorithm is needed with CSMA to sp...

696 views

commented Jan 23, 2022

2 answers

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GATE Overflow Test Series | Mock GATE | Test 3 | Question: 43
The number of canonical covers of the set of functional dependencies $:\{A \rightarrow BC, B \rightarrow CA, C \rightarrow AB \}$ is ________ $1$ $2$ $3$ $>3$

The number of canonical covers of the set of functional dependencies $:\{A \rightarrow BC, B\rightarrow CA, C\rightarrow AB \}$ is ________$1$$2$$3$$>3$

685 views

commented Jan 19, 2022

1 answer

8

Made Easy Test
Suppose there are $11$ nodes in a binary tree. Find the number of unlabeled binary trees if the number of nodes either in the left sub tree or in the right sub tree is divisible by $4.$

Suppose there are $11$ nodes in a binary tree. Find the number of unlabeled binary trees if the number of nodes either in the left sub tree or in the right sub tree is di...

1.2k views

commented Jan 16, 2022

2 answers

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UGC NET CSE | December 2018 | Part 2 | Question: 14
A computer uses a memory unit with $256$ K words of $32$ bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code and a register code part to specify one of $64$ registers and ... code, the register code part and the address part? $7,6,18$ $6,7,18$ $7,7,18$ $18,7,7$

A computer uses a memory unit with $256$ K words of $32$ bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect...

2.7k views

commented Jan 4, 2022

1 answer

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GATE Overflow Test Series | Algorithms | Test 2 | Question: 18
Which of the following statements is/are TRUE with respect to the time complexities of the graph algorithms to find Single Source Shortest Path (SSSP)? (Mark all the appropriate choices) Bellman-Ford algorithm to find SSSP runs in $O(VE)$ Dijkstra ... $O(|V|+|E|)$

Which of the following statements is/are TRUE with respect to the time complexities of the graph algorithms to find Single Source Shortest Path (SSSP)? (Mark all the appr...

266 views

comment edited Jan 2, 2022

1 answer

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GATE Overflow Test Series | Operating Systems | Test 1 | Question: 27
Consider the following snapshot of a system running $n$ processes. Process $i$ is holding $x_i$ instances of a resource $R$,$ 1\leq i\leq n$. Currently, all instances of $R$ are occupied. Further, for all $i$, process $i$ has placed a request for ... $x_{p}+x_{q}\geq \min_{k\neq p,q}y_{k}$ None of the above

Consider the following snapshot of a system running $n$ processes.Process $i$ is holding $x_i$ instances of a resource $R$,$ 1\leq i\leq n$. Currently, all instances of $...

729 views

commented Jan 2, 2022

4 answers

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GATE CSE 2021 Set 2 | Question: 48
Consider a three-level page table to translate a $39-$bit virtual address to a physical address as shown below: The page size is $\text{4 KB} \;(1\text{KB}=2^{10}$ bytes$)$ and page table entry size at every level is $8$ bytes. A ... $P$ across all levels is _________ $\text{KB}$.

Consider a three-level page table to translate a $39-$bit virtual address to a physical address as shown below:The page size is $\text{4 KB} \;(1\text{KB}=2^{10}$ bytes$)...

28.6k views

commented Dec 29, 2021

1 answer

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GATE CSE 1989 | Question: 6a
A certain computer system was designed with cache memory of size $1$ Kbytes and main memory size of $256$ Kbytes. The cache implementation was fully associative cache with $4$ bytes per block. The CPU memory data path was $16$ bits and ... following questions: What is the hit ratio? Suggest a change in the program size of model to improve the hit ratio significantly.

A certain computer system was designed with cache memory of size $1$ Kbytes and main memory size of $256$ Kbytes. The cache implementation was fully associative cache wit...

1.9k views

commented Oct 12, 2021

1 answer

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Pearson Gate 2022 CSE , Computer Organization and Architecture, Chapter 2 , Question 17, Page 2.28
What will be the answer to the following question?

What will be the answer to the following question?

1.1k views

answered Oct 11, 2021

1 answer

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Nptel Assignment Question
The instruction $LDA$ $FF0$ (machine code of $LDA$ is $5$) is stored in location $7F0$. The contents in memory location $FF0$ are loaded into accumulator. After its execution, accumulator stores value $8$. The figure below shows a snapshot of the registers and their contents. ... $MAR = 7F0$, $IR = 5FF0$, $MBR = 5FF0$ $MAR = FF1$, $IR = 5FF0$, $MBR = 7F0$

The instruction $LDA$ $FF0$ (machine code of $LDA$ is $5$) is stored in location $7F0$. The contents in memory location $FF0$ are loaded into accumulator. After its exe...

536 views

answer edited Oct 10, 2021

3 answers

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GATE CSE 2015 Set 2 | Question: 42
Consider a processor with byte-addressable memory. Assume that all registers, including program counter (PC) and Program Status Word (PSW), are size of two bytes. A stack in the main memory is implemented from memory location $(0100)_{16}$ and it grows upward. The stack ... value of the stack pointer is: $(016A)_{16}$ $(016C)_{16}$ $(0170)_{16}$ $(0172)_{16}$

Consider a processor with byte-addressable memory. Assume that all registers, including program counter (PC) and Program Status Word (PSW), are size of two bytes. A stack...

17.0k views

commented Oct 5, 2021

4 answers

17

GATE CSE 2003 | Question: 76
Which of the following is NOT an advantage of using shared, dynamically linked libraries as opposed to using statistically linked libraries? Smaller sizes of executable files Lesser overall page fault rate in the system Faster program startup Existing programs need not be re-linked to take advantage of newer versions of libraries

Which of the following is NOT an advantage of using shared, dynamically linked libraries as opposed to using statistically linked libraries?Smaller sizes of executable fi...

16.3k views

commented May 25, 2021

2 answers

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GATE CSE 2001 | Question: 12
Consider a $5-$stage pipeline - IF (Instruction Fetch), ID (Instruction Decode and register read), EX (Execute), MEM (memory), and WB (Write Back). All (memory or register) reads take place in the second phase of a clock cycle ... Show all data dependencies between the four instructions. Identify the data hazards. Can all hazards be avoided by forwarding in this case.

Consider a $5-$stage pipeline - IF (Instruction Fetch), ID (Instruction Decode and register read), EX (Execute), MEM (memory), and WB (Write Back). All (memory or registe...

18.0k views

commented Apr 10, 2021

9 answers

19

GATE CSE 2006 | Question: 42
A CPU has a five-stage pipeline and runs at $1$ GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new ... : $\text{1.0 second}$ $\text{1.2 seconds}$ $\text{1.4 seconds}$ $\text{1.6 seconds}$

A CPU has a five-stage pipeline and runs at $1$ GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the...

21.2k views

commented Apr 8, 2021

3 answers

20

GATE CSE 2017 Set 2 | Question: 18
Consider socket API on a Linux machine that supports connected UDP sockets. A connected UDP socket is a UDP socket on which connect function has already been called. Which of the following statements is/are CORRECT? A connected UDP socket can be used to communicate with multiple ... $\text{I}$ and $\text{II}$ Neither $\text{I}$ nor $\text{II}$

Consider socket API on a Linux machine that supports connected UDP sockets. A connected UDP socket is a UDP socket on which connect function has already been called. Whic...

15.1k views

commented Apr 7, 2021

13 answers

21

GATE CSE 2007 | Question: 67, ISRO2016-72
The address of a class $\text{B}$ host is to be split into subnets with a $6\;\text{-bit}$ subnet number. What is the maximum number of subnets and the maximum number of hosts in each subnet? $62$ subnets and $262142$ hosts. $64$ subnets and $262142$ hosts. $62$ subnets and $1022$ hosts. $64$ subnets and $1024$ hosts.

The address of a class $\text{B}$ host is to be split into subnets with a $6\;\text{-bit}$ subnet number. What is the maximum number of subnets and the maximum number of ...

35.7k views

commented Apr 6, 2021

tags	tag:apple
author	user:martin
title	title:apple
content	content:apple
exclude	-tag:apple
force match	+apple
views	views:100
score	score:10
answers	answers:2
is accepted	isaccepted:true
is closed	isclosed:true