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1 answer
2
OS
By default the memory address starts with 0. But they have considered from 1. What should I consider when nothing is mentioned?
By default the memory address starts with 0. But they have considered from 1.What should I consider when nothing is mentioned?
1 answer
3
ZEAL SERIES
What should be the answer?
What should be the answer?
1 answer
5
ZEAL TEST
Isn’t the “No of independent rows”= RAnk of matrix?
Isn’t the “No of independent rows”= RAnk of matrix?
0 answers
6
Gate 2015
For problems where the options are not given, like this kinda questions should I consider hierarchical access or simultaneous access. I know that hierarchical access is commonly used so it should be preferred but the solution for this is described using simultaneous access.
For problems where the options are not given, like this kinda questions should I consider hierarchical access or simultaneous access. I know that hierarchical access is c...
1 answer
8
ZEAL TESTSERIES
Options: 10, 12,14, 16, 18, 20 20, 18, 16, 14, 12, 10 12, 10, 16, 14, 20, 18 NONE
Options:10, 12,14, 16, 18, 2020, 18, 16, 14, 12, 1012, 10, 16, 14, 20, 18NONE
2 answers
9
Zeal Testseries
I’m getting 2 as the answer, but the correct one given by them is 5. Somebody please confirm.
I’m getting 2 as the answer, but the correct one given by them is 5.Somebody please confirm.
1 answer
11
Process state
A printf or malloc takes the process to what state? Running Ready Suspended Terminated
A printf or malloc takes the process to what state?RunningReadySuspendedTerminated
1 answer
12
MADEEASY TESTSERIES
To justify the OPTION B they gave an example of 2*2 matrix. However we can see that row 2 is linearly dependent on row1. Even though the 2nd row looks non-zero it can be made into zero. SO am I wrong or the explanation is wrong?
To justify the OPTION B they gave an example of 2*2 matrix. However we can see that row 2 is linearly dependent on row1. Even though the 2nd row looks non-zero it can be ...
2 answers
14
NIELIT STA 2021
The addressing mode / s, which uses the PC instead of a general-purpose register is: Indexed with offset Relative Direct Both Indexed with offset and direct
The addressing mode / s, which uses the PC instead of a general-purpose register is: Indexed with offset RelativeDirectBoth Indexed with offset and direct
2 answers
15
Graph Coloring
How many ways are there to color this graph from any $4$ of the following colors : Violet, Indigo, Blue, Green, Yellow, Orange and Red ? There is a condition that adjacent vertices should not be of the same color I am getting $1680$. Is it correct?
How many ways are there to color this graph from any $4$ of the following colors : Violet, Indigo, Blue, Green, Yellow, Orange and Red ?There is a condition that adjacent...
1 answer
19
Discrete Mathematics
Somebody please clarify the answer
Somebody please clarify the answer
4 answers
21
ISRO2020-57
The hardware implementation which provides mutual exclusion is Semaphores Test and set instructions Both options None of the options
The hardware implementation which provides mutual exclusion isSemaphoresTest and set instructionsBoth optionsNone of the options
8 answers
23
GATE CSE 1997 | Question: 6.4
Which one of the following regular expressions over $\{0,1\}$ denotes the set of all strings not containing $\text{100}$ as substring? $0^*(1+0)^*$ $0^*1010^*$ $0^*1^*01^*$ $0^*(10+1)^*$
Which one of the following regular expressions over $\{0,1\}$ denotes the set of all strings not containing $\text{100}$ as substring?$0^*(1+0)^*$$0^*1010^*$$0^*1^*01^*$$...
2 answers
24
Self Doubt
How many cycle required when pipelining and operand loading is used? R1<-R2+R3 R4<-R1+M[100] Value at M[100]=7 There are 5 phases: F->TO FETCH D->TO DECODE AND OPERAND READ E->EXECUTE M->MEMORY ACCESS W->WRITE BACK Each phase takes 1Cycle .
How many cycle required when pipelining and operand loading is used?R1<-R2+R3R4<-R1+M[100]Value at M[100]=7There are 5 phases:F->TO FETCHD->TO DECODE AND OPERAND READE->...
1 answer
27
Conflict serialziability
How the option c is correct for the given schedules?
How the option c is correct for the given schedules?
2 answers
28
DBMS Korth Edition 4 Exercise 16 Question 27 (Page No. 635)
Explain the phantom phenomenon. Why may this phenomenon lead to an incorrect concurrent execution despite the use of the two-phase locking protocol ?
Explain the phantom phenomenon. Why may this phenomenon lead to an incorrect concurrent execution despite the use of the two-phase locking protocol ?
3 answers
30
Are all Irrecoverable/Non-Recoverable schedules cascading?
Suppose, T1: W(X), T2: R(X), T1: W(X), T2: Commit, T1: Abort Here we can see T2 is getting committed before T1 aborts, so it is clearly an Irrecoverable schedule but is it cascading?
Suppose,T1: W(X), T2: R(X), T1: W(X), T2: Commit, T1: AbortHere we can see T2 is getting committed before T1 aborts, so it is clearly an Irrecoverable schedule but is it ...