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Since it is a Bottom Up Parser do we need to evaluate expressions following Right Hand Derivations or Left Hand Derivations,i.e. should we evaluate D -> d first or B -> B first?
commented Nov 5, 2019 in Compiler Design 305 views
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The value of a $\text{float}$ type variable is represented using the single-precision $\text{32-bit}$ floating point format of $IEEE-754$ standard that uses $1$ $\text{bit}$ for sign, $\text{8 bits}$ for biased exponent and $\text{23 bits}$ for the ... $−14.25$. The representation of $X$ in hexadecimal notation is $C1640000H$ $416C0000H$ $41640000H$ $C16C0000H$
commented Oct 19, 2019 in Digital Logic 4.3k views
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Consider the following statements: S1: The sum of two singular $n \times n$ matrices may be non-singular S2: The sum of two $n \times n$ non-singular matrices may be singular Which one of the following statements is correct? $S1$ and $S2$ both are true $S1$ is true, $S2$ is false $S1$ is false, $S2$ is true $S1$ and $S2$ both are false
commented Oct 11, 2019 in Linear Algebra 2.3k views
8 answers
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A bit-stuffing based framing protocol uses an $\text{8-bit}$ delimiter pattern of $01111110.$ If the output bit-string after stuffing is $01111100101,$ then the input bit-string is: $0111110100$ $0111110101$ $0111111101$ $0111111111$
commented Oct 7, 2019 in Computer Networks 8k views
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Given Set $A= {2, 3, 4, 5}$ and Set $B= { 11, 12, 13, 14, 15}$, two numbers are randomly selected, one from each set. What is the probability that the sum of the two numbers equals $16$? $0.20$ $0.25$ $0.30$ $0.33$
commented Sep 29, 2019 in Numerical Ability 2k views
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A $CFG$ $G$ is given with the following productions where $S$ is the start symbol, $A$ is a non-terminal and $a$ and $b$ are terminals. $S \to aS \mid A$ $A \to aAb \mid bAa \mid \epsilon$ Which of the following strings is generated by the grammar above? $aabbaba$ $aabaaba$ $abababb$ $aabbaab$
commented Sep 21, 2019 in Theory of Computation 2.9k views
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What is the minimum number of NOR gates required to implement this boolean function? A'B + A'CDB + AC'B + ABC Also how many NAND gates required? Confirm answer am getting zero.
commented Jan 26, 2019 in Digital Logic 1.2k views
1 answer
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Bias formula for floating point representation is 2^k-1 bias formula for IEEE floating point representation is 2^(k-1)-1 Is it right????
commented Jan 25, 2019 in CO and Architecture 115 views
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$(0.5)_{10}$ in IEEE 754 Single precision floating point representation $(0.5)_{10}$ = $(0.1)_{2}$ here $(0.1)_{2}$ should be represented in SUBNORMAL form Or Normalized for ..??? here $(0.1)_{2}$ * 2^{0}$...E = 0 and no leading 1 ..will it be represented in SUBNORMAL form ??
answered Jan 24, 2019 in Digital Logic 72 views
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How can we convert a signed number to it's equivalent unsigned number? Let's say I have signed number as -2 now what would be it's equivalent unsigned representation. Thanks!
answered Jan 24, 2019 in Digital Logic 191 views
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$\text{How we can represent a number like 234.4437 using 2's complement representation?}$ $\text{Or we are supposed to represent it using floating point representation? Please explain }$
commented Jan 23, 2019 in Digital Logic 104 views
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What is the reason for Belady’s Anomaly,I am aware that it is not a stack based algorithm and for a certain set of pages it shows this anomaly where the increase in page frame increases the page fault rate.
answered Jan 19, 2019 in Operating System 268 views
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A Computer system implements 8 kilobyte pages and a 32-bit physical address space. Each page table entry contains a valid bit, and the translation. If the maximum size of the page table of a process is 20 megabytes, then what will the length of the virtual address ... .in/8247/gate2015-2_47 The above question related to this gate question.But when I tried i got 33 bit but i choose 30 bits
commented Jan 19, 2019 in Operating System 230 views
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Let the page fault service time be $10$ milliseconds(ms) in a computer with average memory access time being $20$ nanoseconds (ns). If one page fault is generated every $10^6$ memory accesses, what is the effective access time for memory? $21$ ns $30$ ns $23$ ns $35$ ns
commented Jan 19, 2019 in Operating System 12.1k views
3 answers
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Q. Suppose you have a computer system with a 48-bit logical address, page size of 16KB and 4 bytes per page table entry. If we have a 48MB program such that the entire program and all necessary page tables are in memory. Assume that each page table at diff level fits in a single page.How much memory is used by program, including its page tables?
answered Jan 18, 2019 in Operating System 2.9k views
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A demand paging system has page fault service time as 125 time units if page is not dirty and 400 times units of page fault service time if it is a dirty page. Memory access time is 10 time units. The probability of a page fault is 0.3. In case of page fault, the ... dirty is P. It is observed that average access time is 50 time units. Then, the value of P is ______? [upto four decimal places]
commented Jan 17, 2019 in Operating System 500 views
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A 32-bit machine has a page/frame size of 1 KB. (i) What is the size of the complete first-level (primary) page table for a process? (ii) If page tables are also stored using paging, how many levels of paging will be required?
commented Jan 16, 2019 in Operating System 247 views
1 answer
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Whenever Questions like:- (Example is shown below) is given and asked that say what is the turnaround time for $6k$ Process then we will always assume memory to have fixed length partition right??? cuz they have given different partition sizes in $KB$ so say if a process allocates $2k$ ...
answered Jan 16, 2019 in Operating System 77 views
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Explain Last In First Out (LIFO) and MRU with this example and find a number of a page fault. Question: Let the number of the frame in main memory is 5. Reference String: 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10
answered Jan 16, 2019 in Operating System 86 views
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Given 64 bit logical space, Page Size = $4KB$. Do the three level paging? My Solution:- 1. Since address space is =$ 2^{64} Bytes$ Page size = $2^{12}$ Bytes. Number of entries in third level Page table is :- $2^{64} / 2^{12}$ = $2^{52}$. Size of third level ... three levels as:- $1st$ level $2nd$ level $3rd$ level Offset $ 32$ $10$ $10$ $12$ Please explain how did they find this out ? Please :)
answered Jan 16, 2019 in Operating System 533 views
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In a 32-bit machine we subdivide the virtual address into 4 segments as follows: 10-bi 8-bit 6-bit 8 bit We use a 3-level page table, such that the first 10-bit are for the first level and so on. Page Table Entry Size is 2B 10-bit 8-bit 6-bit 8 bit What ... greater than page size which is 2^8 so outer most page cannot fit in one page table But outermost page table should fit in one page ?? ref:
commented Jan 16, 2019 in Operating System 286 views
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Suppose : TLB lookup time = 20 ns TLB HIT ratio = 80% Memory access time = 75 ns Swap page time = 500000 ns 50% pages are dirty and os uses a single level page table a) what is EMAT if we assume page fault 0%? b) what is EMAT if page fault 10% ? In both cases assume cost to update TLB , page table , frame table is negligible (if needed).
commented Jan 16, 2019 in Operating System 147 views
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CPU generates logical address and that logical address is converted to physical address. What does this means exactly ?? Assume run time binding is used. When process P1 is loaded in memory lets say at 10k Lets say OS scheduler schedules P1,so CPU should start ... cpu generates address means we put that address in MAR to get some data/instruction from memory right ? Please help me in this
commented Jan 16, 2019 in Operating System 312 views
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I have watched two video lectures on OS memory management (PK Biswas and IISc Mathew Jacob). In both lectures they say that the compiler assumes (while compiling and generating the logical addresses to instructions) that for each process, all of the virtual address space is ... the page table of each process consists of same number of entries..? Is it the real reason to use valid/invalid bit ?
commented Jan 16, 2019 in Operating System 181 views
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Consider a system with byte-addressable memory, $32-bit$ logical addresses, $4$ $kilobyte$ page size and page table entries of $4$ $bytes$ each. The size of the page table in the system in $megabytes$ is_________________.
commented Jan 16, 2019 in Operating System 3.4k views
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A computer uses 30 bit physical address, 38 bit virtual address and uses 2-level paging. The page table base register stores the base address of the first level, Each page table, occupied exact one page. Each entry of first level store base address of second level table and ... of second level table store a page table entry which is of size 32 bits. The size of page in KB in computer is ________.
commented Jan 16, 2019 in Operating System 370 views
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