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Answers by GateAspirant999

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MADEEASY
The 3-bit ripple counter (shown below) is to be designed as a MOD 4 counter What is the best architecture of the ‘Logic gate’? A. a 3-bit input AND gate B. a 2-input AND gate C. a NOT gate D. a wire connection (no logic gate needed) Ans is given D but i think ans should be C Please Explain
The 3-bit ripple counter (shown below) is to be designed as a MOD 4 counterWhat is the best architecture of the ‘Logic gate’?A. a 3-bit input AND gateB. a 2-input AND...
–1 votes
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GATE CSE 2001 | Question: 1.7, ISRO2008-18
More than one word are put in one cache block to: exploit the temporal locality of reference in a program exploit the spatial locality of reference in a program reduce the miss penalty none of the above
More than one word are put in one cache block to:exploit the temporal locality of reference in a programexploit the spatial locality of reference in a programreduce the m...
1 votes
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Cycle Stealing(DMA)
In Cycle Stealing, does the DMA interrupt the processor everytime, or it uses the cycle while the processor remains unknown of the fact?
In Cycle Stealing, does the DMA interrupt the processor everytime, or it uses the cycle while the processor remains unknown of the fact?