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Answers by GateAspirant999

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MADEEASY
The 3-bit ripple counter (shown below) is to be designed as a MOD 4 counter What is the best architecture of the ‘Logic gate’? A. a 3-bit input AND gate B. a 2-input AND gate C. a NOT gate D. a wire connection (no logic gate needed) Ans is given D but i think ans should be C Please Explain

answered in Digital Logic Jan 29, 2018

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–1 vote

2

GATE CSE 2001 | Question: 1.7, ISRO2008-18
More than one word are put in one cache block to: exploit the temporal locality of reference in a program exploit the spatial locality of reference in a program reduce the miss penalty none of the above

answered in CO and Architecture Jan 4, 2018

13.9k views

1 vote

3

Cycle Stealing(DMA)
In Cycle Stealing, does the DMA interrupt the processor everytime, or it uses the cycle while the processor remains unknown of the fact?

answered in CO and Architecture Feb 19, 2017

14.8k views

5 votes

4

GATE IT 2007 | Question: 68
Consider the following relation schemas : b-Schema = (b-name, b-city, assets) a-Schema = (a-num, b-name, bal) d-Schema = (c-name, a-number) Let branch, account and depositor be respectively instances of the above schemas. Assume that account and ... depositor) Пc-name (σb-city = "Agra" branch ⋈ (σb-city = "Agra" ⋀ bal < 0 account ⋈ depositor))

answered in Databases Aug 21, 2016

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