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Answers by GateRank1
0
votes
1
Ace Test Series: Digital Logic - Decoder
A $3$ line to $8$ line Decoder is used to implement a $3$-variable Boolean function as shown in figure. The simplified form of output $Y$ is. $\bar{X}Y + \bar{Y}Z + XY\bar{Z}$ $\bar{X}Z +\bar{Y}Z + XYZ$ $X\bar{Y} + X\bar{Z} +\bar{X}YZ$ $X\bar{Y} + X\bar{Z} + \bar{X}Y\bar{Z}$
A $3$ line to $8$ line Decoder is used to implement a $3$-variable Boolean function as shown in figure.The simplified form of output $Y$ is.$\bar{X}Y + \bar{Y}Z + XY\bar{...
1.9k
views
answered
Jan 19, 2016
Digital Logic
ace-test-series
digital-logic
decoder
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–
3
votes
2
Fork
what if the program like this(t1 is copied to all or printf will copied to all child) main() { t1=0,t2=0; t2=fork(); Fork(); Printf("Hi"); Fork(); t1=Fork(); Printf("hi"); } Arjun sir , I don't know the buffer concept.please explain with tree method. How many child and how many time Hi printed.
what if the program like this(t1 is copied to all or printf will copied to all child)main(){t1=0,t2=0;t2=fork();Fork();Printf("Hi");Fork();t1=Fork();Printf("hi");}Arjun s...
1.3k
views
answered
Dec 27, 2015
Operating System
fork-system-call
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–
–3
votes
3
GATE CSE 2001 | Question: 20
Consider a disk with the $100$ tracks numbered from $0$ to $99$ rotating at $3000$ rpm. The number of sectors per track is $100$ and the time to move the head between two successive tracks is $0.2$ millisecond. Consider a set of disk ... at track $0$ and the elevator algorithm is used to schedule disk requests, what is the worse case time to complete all the requests?
Consider a disk with the $100$ tracks numbered from $0$ to $99$ rotating at $3000$ rpm. The number of sectors per track is $100$ and the time to move the head between two...
10.9k
views
answered
Dec 22, 2015
Operating System
gatecse-2001
operating-system
disk
normal
descriptive
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–
12
votes
4
Q-13 (ch-2) Made easy workbook 2015
The control field of 1-address control word has to support 2 groups of control signals.In the group-1 it is requires to generate either 1 or none of the 63 control signals.In the group-2 at most 4 from the remaining.What will be the minimum no. bits needed for control field. option (A) 6 option (B) 10 option (c) 67 option (D) 81.
The control field of 1-address control word has to support 2 groups of control signals.In the group-1 it is requires to generate either 1 or none of the 63 control signal...
3.3k
views
answered
Dec 21, 2015
CO and Architecture
microprogramming
co-and-architecture
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–
0
votes
5
memory
505
views
answered
Dec 18, 2015
0
votes
6
memory
356
views
answered
Dec 17, 2015
1
votes
7
check the question
100 nodes are connected to a 1000 meter length coaxial cable,using some protocol each node can transmit 50 frames/sec. where the average frame length is 2500 bits.the transmisson rate at each node is 100 mbps.what is the numeric value of efficiency of the protocol(in %)?
100 nodes are connected to a 1000 meter length coaxial cable,using some protocol each node can transmit 50 frames/sec.where the average frame length is 2500 bits.the tran...
492
views
answered
Dec 15, 2015
0
votes
8
csma/cd
Two csma/cd stations are trying to send frames..After each frame is sent they contend for channel using backoff exponential algorithm?What is probability that contention ends on round k?
Two csma/cd stations are trying to send frames..After each frame is sent they contend for channel using backoff exponential algorithm?What is probability that contention ...
2.7k
views
answered
Dec 15, 2015
Computer Networks
computer-networks
csma-cd
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–
0
votes
9
assume 10 Mbps Ethernet and two station A and B on it's same segment.......
assume 10 Mbps Ethernet and two station A and B on it's same segment. The RTT between two nodes is 650 bit times. A and B start transmitting frame and collision occure and both sends 30 bit jam signal. find the time at which both nodes A and B sense an idle channel(in micro sec)_____
assume 10 Mbps Ethernet and two station A and B on it's same segment. The RTT between two nodes is 650 bit times. A and B start transmitting frame and collision occure an...
1.1k
views
answered
Dec 15, 2015
0
votes
10
Suppose host A want to send a large file to host B. ..
Suppose host A want to send a large file to host B. the path from host A to host B has 3 links of rates R1=512 Kbps, R2=2 Mbps and R3=1 Mbps. what is the throughput for the file transfer(in Kbytes per minuts)_____
Suppose host A want to send a large file to host B. the path from host A to host B has 3 links of rates R1=512 Kbps, R2=2 Mbps and R3=1 Mbps. what is the throughput for t...
2.1k
views
answered
Dec 15, 2015
4
votes
11
Data Link Layer
Compute the fraction of the bandwidth that is wasted on overhead (headers and retransmissions) for protocol 6 on a heavily loaded 50 kbps satellite channel with data frames consisting of 40 header and 3960 data bits. Assume that the signal propagation time from the ... error rate for data frames is 1% and the error rate for NAK frames is negligible. The sequence numbers are 8 bits.
Compute the fraction of the bandwidth that is wasted on overhead (headers and retransmissions) for protocol 6 on a heavily loaded 50 kbps satellite channel with data fram...
1.5k
views
answered
Dec 15, 2015
Computer Networks
computer-networks
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–
14
votes
12
TIFR CSE 2013 | Part B | Question: 5
Given a weighted directed graph with $n$ vertices where edge weights are integers (positive, zero, or negative), determining whether there are paths of arbitrarily large weight can be performed in time $O(n)$ $O(n . \log(n))$ but not $O (n)$ $O(n^{1.5})$ but not $O (n \log n)$ $O(n^{3})$ but not $O(n^{1.5})$ $O(2^{n})$ but not $O(n^{3})$
Given a weighted directed graph with $n$ vertices where edge weights are integers (positive, zero, or negative), determining whether there are paths of arbitrarily large ...
4.5k
views
answered
Dec 13, 2015
Algorithms
tifr2013
algorithms
graph-algorithms
time-complexity
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–
0
votes
13
GATE CSE 2014 Set 2 | Question: 47
The product of the non-zero eigenvalues of the matrix is ____ $\begin{pmatrix} 1 & 0 & 0 & 0 & 1 \\ 0 & 1 & 1 & 1 & 0 \\ 0 & 1 & 1 & 1 & 0 \\ 0 & 1 & 1 & 1 & 0 \\ 1 & 0 & 0 & 0 & 1 \end{pmatrix}$
The product of the non-zero eigenvalues of the matrix is ____$\begin{pmatrix} 1 & 0 & 0 & 0 & 1 \\ 0 & 1 & 1 & 1 & 0 \\ 0 & 1 & 1 & 1 & 0 \\ 0 & 1 & 1 & 1 & 0 \\ 1 & 0 & ...
37.4k
views
answered
Nov 30, 2015
Linear Algebra
gatecse-2014-set2
linear-algebra
eigen-value
normal
numerical-answers
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–
1
votes
14
PAGING
A Program of size 64MB is stored on disk which supports an average seek time of 30ms and rotation time of 20ms.Page size is 4MB and track size is 32MB. if the pages of program are contiguosly placed on disk then what would be the total time required to load the program from disk?
A Program of size 64MB is stored on disk which supports an average seek time of 30ms and rotation time of 20ms.Page size is 4MB and track size is 32MB. if the pages of pr...
1.2k
views
answered
Nov 24, 2015
Operating System
operating-system
disk
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–
0
votes
15
calculate limit
$\lim_{x\rightarrow 0}\left ( \frac{a^{x}+b^{x}}{2} \right )^{^{\frac{1}{x}}}$
$\lim_{x\rightarrow 0}\left ( \frac{a^{x}+b^{x}}{2} \right )^{^{\frac{1}{x}}}$
504
views
answered
Jul 17, 2015
Calculus
calculus
limits
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–
28
votes
16
GATE CSE 2015 Set 1 | Question: 26
$\sum\limits_{x=1}^{99}\frac{1}{x(x+1)}$ = ______.
$\sum\limits_{x=1}^{99}\frac{1}{x(x+1)}$ = ______.
8.2k
views
answered
Jul 16, 2015
Combinatory
gatecse-2015-set1
combinatory
normal
numerical-answers
summation
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–
0
votes
17
Average Access time in Memory Organization
Consider a Processor with two Caches which it can access directly in parallel $L_1$(80% hit rate) and $L_2$(90% hit rate) with access times as 100ns and 200ns respectively. In case of miss in any of those it fetches the data from hard disk $L_3$(100% hit rate) which has a latency of 500ns. What is the average access time($T_{avg}$) of the organization?
Consider a Processor with two Caches which it can access directly in parallel $L_1$(80% hit rate) and $L_2$(90% hit rate) with access times as 100ns and 200ns respectivel...
4.3k
views
answered
Jul 10, 2015
CO and Architecture
cache-memory
co-and-architecture
page-fault
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