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Questions by Kaluti

0 votes
2 answers
21
discrete maths
How many ordered pair of integers (a, b) are needed to guarantee that there are two ordered pairs (a1, b1) and (a2, b1) such that a1 mod 5 = a2 mod 5 and b1 mod 5 = b2 mod 5? should not answer be 25 here
How many ordered pair of integers (a, b) are needed to guarantee that there are two ordered pairs (a1, b1) and (a2, b1) such that a1 mod 5 = a2 mod 5 and b1 mod 5 = b2 mo...
0 votes
1 answer
22
discrete maths
What is the coefficient of $x^{12}$ in the power series of $\dfrac{x^3}{(1+2x)^2}?$
What is the coefficient of $x^{12}$ in the power series of $\dfrac{x^3}{(1+2x)^2}?$
0 votes
1 answer
23
discrete maths
Consider the following statements: S1: Every cyclic group is Abelian group. S2: Every Abelian group is cyclic group. S3: Cyclic group of order 10 have 4 generators. Which of the following is true?
Consider the following statements:S1: Every cyclic group is Abelian group.S2: Every Abelian group is cyclic group.S3: Cyclic group of order 10 have 4 generators.Which of ...
1 votes
0 answers
24
discrete mathmatics
Consider two sets A and B such that: AUB $\subseteq$ A $\cap$ B Then, which of the following is incorrect? A A = { } and B={} ALWAYS B |A| = |B| C A=B D none of these
Consider two sets A and B such that: AUB $\subseteq$ A $\cap$ BThen, which of the following is incorrect?A A = { } and B={} ALWAYSB |A| = |B|C A=BD none of these
0 votes
0 answers
25
computer organization
A DMA is transferring characters to processor from a device transmitting at 8000 bits per sec. Assume DMA using cycle stealing mode. If processor needs access to main memory once every micro second. The percentage processor be slow down due to DMA activity is ______ (in %).
A DMA is transferring characters to processor from a device transmitting at 8000 bits per sec. Assume DMA using cycle stealing mode. If processor needs access to main mem...
0 votes
1 answer
26
computer organization
A CPU has 24 bit instructions and we have to calculate the sum of n number by using below code: The value of X, if target address of branch is loop, when instruction is uses PC relative addressing mode is ________. (Assume memory is byte addressable)
A CPU has 24 bit instructions and we have to calculate the sum of n number by using below code:The value of X, if target address of branch is loop, when instruction is us...
2 votes
2 answers
27
computer organization
suppose that in 1000 memory reference there are 40 misses in the first level cache and 20 misses in the second level cache. Assume miss penalty from the L2 cache to memory is 100 cycles the hit time of the L2 cache is 10 clock cycles.the hit time of the L1 cache is 1 clock cycle. what is average memory access time?
suppose that in 1000 memory reference there are 40 misses in the first level cache and 20 misses in the second level cache. Assume miss penalty from the L2 cache to memor...
0 votes
0 answers
31
computer organization
Consider a 16 bit processor in which the following one address instruction is loaded into main memory : The effective address using PC-relative addressing mode when processor is executing an instruction at location 100 is __________ (Assume memory is of Byte addressable).
Consider a 16 bit processor in which the following one address instruction is loaded into main memory :The effective address using PC-relative addressing mode when proces...
1 votes
0 answers
34
computer organization
Consider an instruction of indirect addressing mode. What are the number of memory reference by th eprocessor when instruction is a computation that requires a single operand and when it is a branch instruction respectively? according to me answer should be 2,2
Consider an instruction of indirect addressing mode. What are the number of memory reference by th eprocessor when instruction is a computation that requires a single op...
2 votes
1 answer
35
computer networks
Asymmetric key cryptrography and digital signature both use the private and public keys of the sender. explain is it true or false
Asymmetric key cryptrography and digital signature both use the private and public keys of the sender. explain is it true or false
1 votes
1 answer
40
theory of computation
(o^(n))^(m)|n<m;n,m>=1 is it regular
(o^(n))^(m)|n<m;n,m>=1is it regular
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