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1

Made Easy test series DS
Consider a binary tree where for every node ⏐P – Q⏐ ≤ 2. P represents number of nodes in left sub tree for node S and Q represents the number of nodes in right sub tree for node S for h > 0. The minimum number of nodes present in such binary tree of height h = 4 _________. (Assume root is at height 0)

commented in DS Jan 24, 2019

1.5k views

1 answer

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DCFL COMPLETENESS PROBLEM
DCFL COMPLETENESS PROBLEM is decidable or not? L=(sigma)* Not getting any discussion regarding it in GO,iN GO chart it is decidable but I am not able to conclude the reason please guide?

answer selected in Theory of Computation Jan 24, 2019

646 views

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MadeEasy Test Series: CO & Architecture - Speedup
A hypothetical processor on cache read miss require one clock to send an address to MM and eight clock cycle to access a 64 bit word from MM to processor cache.miss rate of read is decreased from 14.8% to 2.6% when line size of cache is ... bz , the complete line got transfer when request of one word is made in ans key it is 4*(1+8) mentioned

commented in CO and Architecture Jan 17, 2019

270 views

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ME test
cache B access time ?

commented in CO and Architecture Jan 15, 2019

164 views

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ME CBT 1
WHICH ONE OF THE following represent the overflow in signed arithmetic? xyx+x’y’z’ x’yz’ + xyz’ x’y’z+xyz’ xy’z’ + x’y’z Dount: in this it is not mentioned anything about x,y,z how one can assume two are number and one is for carry without information, x,y,z can be three numbers also, we all know answer bz it is already come in gate previous year, please guide me

commented in Digital Logic Jan 14, 2019

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commented in Set Theory & Algebra Jan 14, 2019

545 views

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GROUP
does it satisfy for every subset of R?

answered in Engineering Mathematics Jan 14, 2019

395 views

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Average Number of stalls
Consider a CPU contains 2000 instructions, there are 80 misses in the L1 cache and 40 misses in the L2 cache. Assume miss penalty from the L2 cache to memory is 200 clock cycles, the hit time of L2 cache is 30 clock cycles, the hit time of L1 cache is 5 clock cycles and ... 0.95 * 0 {As there is no stalls when hit in L1 cache} + 0.05(30 + 0.5 * 200) 6.5 stalls/instruction.

commented in CO and Architecture Jan 11, 2019

922 views

1 answer

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#madeeasy
bool foo(char *s) { char c[ ]=”correspondence”; int i=0,j=0; While(s[i] && c[j]) { if (s[i] ==c[j]) j++; i++; } if(! c[j]) return true; else return false; } The string ‘response’ and ‘credence' are passed to the above function too one by one and output is observed in each case. book data type return true or false

commented in Programming Jan 11, 2019

311 views

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made easy
Consider Dijkstra's algorithm in the link state routing protocol at node u,professor Ram first sets the route for each directly connected node v to be the link connecting u to v.Ram then implements the rest of the algorithm correctly,aiming to produce a minimum-cost routes,but ... link costs where all routing table entry (other than from u to itself) will be correct. D)Both (A) and (B)

answered in Computer Networks Jan 7, 2019

654 views

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ME OTS : Pipelining
Consider the following statements (I) Execution time for single instruction on six stage pipelined CPU is less than or equal to identical non- pipelined CPU. (ii) In a uniform delay pipeline execution time for a single instruction is equal to the ... if stage delay exist then for single execution, pipeline time will not be equal. Hence 2nd statement wont be true always.

commented in CO and Architecture Jan 6, 2019

981 views

3 answers

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Madeeasy test series
Suppose that a cache is 20 times faster than main memory and cache memory can be used 80% of the time. The speed up factor that can be achieved by using the cache is

commented in CO and Architecture Jan 6, 2019

5.5k views

4 answers

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GATE CSE 2017 Set 2 | Question: GA-9
The number of roots of $e^{x}+0.5x^{2}-2=0$ in the range $[-5,5]$ is $0$ $1$ $2$ $3$

answered in Quantitative Aptitude Jan 4, 2019

11.1k views

1 answer

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Combinatory
How many ways can we distribute at most 10 identical balls to 3 boxes?

commented in Combinatory Jan 2, 2019

912 views

5 answers

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GATE CSE 2017 Set 1 | Question: 41
Consider a database that has the relation schemas EMP(EmpId, EmpName, DeptId), and DEPT(DeptName, DeptId). Note that the DeptId can be permitted to be NULL in the relation EMP. Consider the following queries on the database expressed in tuple relational calculus. { ... Which of the above queries are safe? I and II only I and III only II and III only I, II and III

commented in Databases Jan 1, 2019

21.7k views

1 answer

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Multicast Addressing
Consider an $IPV4$ addressing system, where at a same time two multicast group are ongoing, by choosing their multicast group address at random.Then the probability they interfere each other is _________________$\times 10^{9}$ how to solve multicast address?

commented in Computer Networks Dec 31, 2018

413 views

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Made Easy CA
memory can be accessed only through load and store,p,q,r,s,t initially stored in memory,binary operator can be evaluated only when both operands are in register, I am getting 3 , but given is 4 .

closed in CO and Architecture Dec 31, 2018

128 views

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Test by Bikram | Computer Organization and Architecture | Test 2 | Question: 23
Consider a two level memory hierarchy having only one level cache and main memory. Cache and Main memory access times are $20$ ns and $120$ ns/word respectively. The size of cache block is $4$ words . If main memory is referenced $40 \%$ of the times, then average access time is _______ ns

commented in CO and Architecture Dec 30, 2018

309 views

2 answers

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cache memory
A computer system contains a main memory of 32K 16-bit words. It also has a 4Kword cache divided into four-line sets with 64 words per line. Assume that the cache is initially empty. The processor fetches words from locations 0, 1, 2, . . ., ... is 10 times faster than main memory. Estimate the improvement resulting from the use of the cache. Assume an LRU policy for block replacement.

commented in CO and Architecture Dec 30, 2018

4.3k views

1 answer

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GATE CSE 2011 | Question: 28
On a non-pipelined sequential processor, a program segment, which is the part of the interrupt service routine, is given to transfer $500$ bytes from an I/O device to memory. Initialize the address register Initialize the count to 500 LOOP: Load a byte from device Store ... is used in a place of the interrupt driven program based input-output? $3.4$ $4.4$ $5.1$ $6.7$

commented in CO and Architecture Dec 28, 2018

13.4k views

3 answers

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MadeEasy Test Series: CO & Architecture - Addressing Modes
The Data transfer instruction size is $64-bit$ ALU, ALU operation instruction size is $32-bit$ and branch instruction size is $16-bit$. Assume program has been loaded in the memory starting from address 3000 decimal. If an ... executing, PC value will be 3030, but given answer is 3028 Previous Q: https://gateoverflow.in/1058/gate2004-63

comment edited in CO and Architecture Dec 27, 2018

1.4k views

9 answers

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GATE CSE 2003 | Question: 18
In a bottom-up evaluation of a syntax directed definition, inherited attributes can always be evaluated be evaluated only if the definition is L-attributed be evaluated only if the definition has synthesized attributes never be evaluated

commented in Compiler Design Dec 24, 2018

31.1k views

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Compiler theory
LR grammars describe a proper superset of the languages recognized by LL (predictive) parsers “Unable to interpret this statement completely” Please guide Source: https://parasol.tamu.edu/~rwerger/Courses/434/lec8.pdf

asked in Compiler Design Dec 23, 2018

177 views

1 answer

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MadeEasy Subject Test 2019: Operating System - Resource Allocation
A system has 28 instances of resource P such that 4+n processes share them, 4 process request 5 instances of P. If n processes request 5 instances of same resource what is maximum value of n such that the system is in safe state.(ans=2).pls explain.

commented in Operating System Dec 18, 2018

1.3k views

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Rice theorem
1.{<M>| M is a TM accepts any string starting with 1} 2.{<M>| M is TM accept exactly 20 strings} Please guide I don’t know how to apply rice theorem. for 1. Is Tyes = { string starting with 1} Tno = { all strings – strings starting with 1} what is Tyes and Tno here? I only conclude by intution that when we provide strings as input some got into loop and some got accepts .

commented in Theory of Computation Dec 17, 2018

411 views

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self_doubt
1) L(M) is recognized by a TM having even number of states. 2) L(M) is infinite. whether this language are follow non-trivial property ? Whether this languages are decidable ?.

commented in Theory of Computation Dec 17, 2018

413 views

1 answer

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Turing Machine lecture content stan..
A = { <M,w> | M is a TM that accepts W} what is A’( A complement)? Pls guide : M is a Tm doesn,t accept w, Unable to approach further Source:https://web.stanford.edu/class/archive/cs/cs103/cs103.1134/lectures/20/Small20.pdf

commented in Theory of Computation Dec 16, 2018

217 views

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JOIN (Natural join)
In a natural join, the common attribute occur only once, but in join https://gateoverflow.in/3718/gate2004-it-74 Select * from Student, Department in this common, attribute we have given m+n I tried in w3 schools https://www.w3schools.com/sql/ ... * FROM Orders, Customers WHERE City='Berlin' AND OrderID = '10248' here common attribute is occuring only once, PLease guide .

asked in Databases Dec 14, 2018

278 views

11 answers

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GATE CSE 2018 | Question: 1
Which one of the following is a closed form expression for the generating function of the sequence $\{a_n\}$, where $a_n = 2n +3 \text{ for all } n=0, 1, 2, \dots$? $\frac{3}{(1-x)^2}$ $\frac{3x}{(1-x)^2}$ $\frac{2-x}{(1-x)^2}$ $\frac{3-x}{(1-x)^2}$

commented in Combinatory Dec 12, 2018

18.8k views

1 answer

30

Interview Question
Given an Unsorted array, Find maximum in less than O(n) time? How can we do this?

asked in Algorithms Nov 27, 2018

283 views