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Answers by SHUBHAM SHASTRI

0 votes
1
Self doubt
A micro programmed control unit uses one address instruction for control word sequencing. Based on the behaviour of control signals,the control signal field is divided into 6 groups. Each group contains mutually exclusive control signals. The following table ... 16 How many bits are saved in control field with respect to horizontal micro programming What is max degree of parallelism
A micro programmed control unit uses one address instruction for control word sequencing. Based on the behaviour of control signals,the control signal field is divided into 6 groups. Each group contains mutually exclusive control signals. The following table gives ... 16 How many bits are saved in control field with respect to horizontal micro programming What is max degree of parallelism
answered Dec 17, 2018 in CO and Architecture 46 views
1 vote
2
semaphore
a) s1-wait(p) , s2-wait(q) , s3-wait(q) , s4-wait(p) b) s1-wait(p) , s2-wait(q) , s3-wait(p) , s4-wait(q) c) s1-wait(q) , s2-wait(p) , s3-wait(p) , s4-wait(q) d) none of above
a) s1-wait(p) , s2-wait(q) , s3-wait(q) , s4-wait(p) b) s1-wait(p) , s2-wait(q) , s3-wait(p) , s4-wait(q) c) s1-wait(q) , s2-wait(p) , s3-wait(p) , s4-wait(q) d) none of above
answered Dec 12, 2018 in Operating System 458 views
1 vote
3
ME Test Series
answered Nov 23, 2018 in CO and Architecture 73 views
0 votes
4
NORMALIZATION
The Highest Normal Form of the Following Relation? R(ABCDE) FD={AB$\rightarrow$C,DE$\rightarrow$C,B$\rightarrow$D} EDIT :- Decompose it into BCNF if possible
The Highest Normal Form of the Following Relation? R(ABCDE) FD={AB$\rightarrow$C,DE$\rightarrow$C,B$\rightarrow$D} EDIT :- Decompose it into BCNF if possible
answered Nov 19, 2018 in Databases 330 views
1 vote
5
Mca / Bca term end examination IGNOU June 2018
How many chips of 512K * 8 are required for constructing 4M * 32 memory?
How many chips of 512K * 8 are required for constructing 4M * 32 memory?
answered Nov 15, 2018 in CO and Architecture 142 views
1 vote
7
#addressing
Consider a hypothetical CPU which supports 16 bit instruction, 64 registers and 1 KB memory space. If there exist 12 2-address instruction which uses register reference and 12 1-address memory reference instructions how many O-address instructions are possible?
Consider a hypothetical CPU which supports 16 bit instruction, 64 registers and 1 KB memory space. If there exist 12 2-address instruction which uses register reference and 12 1-address memory reference instructions how many O-address instructions are possible?
answered Nov 4, 2018 in CO and Architecture 666 views
0 votes
8
#madenotes
A B C 1 1 1 1 1 0 2 3 2 2 3 2 FIND NON-TRIVIAL DEPENDENCY
A B C 1 1 1 1 1 0 2 3 2 2 3 2 FIND NON-TRIVIAL DEPENDENCY
answered Oct 31, 2018 in Databases 86 views
1 vote
9
self doubt
! In the box it is DQ0Q1Q2Q3. option is a) 3 b) 4 c) 6 d) 7
! In the box it is DQ0Q1Q2Q3. option is a) 3 b) 4 c) 6 d) 7
answered Oct 24, 2018 in Digital Logic 116 views
1 vote
10
test series
after execution of 15p and 18 v operations semaphore value is same as execution of A. 3P C.12P&15V B.3V C. Both B&C what is the solution
after execution of 15p and 18 v operations semaphore value is same as execution of A. 3P C.12P&15V B.3V C. Both B&C what is the solution
answered Oct 20, 2018 in Operating System 146 views
0 votes
11
Morris Mano
Simplify the following Boolean function F together with the don't-care conditions d; then express the simplified function in sum of minterms. F(A, B, C, D) = $\sum$(0, 6, 8, 13, 14) d(A, B, C, D) = $\sum$ (2, 4, 10)
Simplify the following Boolean function F together with the don't-care conditions d; then express the simplified function in sum of minterms. F(A, B, C, D) = $\sum$(0, 6, 8, 13, 14) d(A, B, C, D) = $\sum$ (2, 4, 10)
answered Oct 18, 2018 in Digital Logic 127 views
0 votes
12
Made easy
answered Oct 16, 2018 in Databases 45 views
0 votes
13
made easy test series
answered Oct 12, 2018 in Computer Networks 58 views
7 votes
14
Addressing Mode
Consider we have an instruction Load 1000. Given Memory and Register R1 as Follows. What is the actual value Loaded in the accumulator ? A. 1000 1400 1300 1000 B. 1400 1300 1000 1000 C. 1000 1300 1400 1000 D. 1300 1000 1400 1000
Consider we have an instruction Load 1000. Given Memory and Register R1 as Follows. What is the actual value Loaded in the accumulator ? A. 1000 1400 1300 1000 B. 1400 1300 1000 1000 C. 1000 1300 1400 1000 D. 1300 1000 1400 1000
answered Oct 12, 2018 in CO and Architecture 461 views
1 vote
15
Ace book-FILESYSTEM
The UNIX I-node contains 8-direct disk block addresses, a single indirect and a double indirect entry for a disk block of size 2KB and 16 bit disk block addresses, the maximum file size supported will be: a) 2.0 G b)2.01 M c)2.018 M d) 2.018 G
The UNIX I-node contains 8-direct disk block addresses, a single indirect and a double indirect entry for a disk block of size 2KB and 16 bit disk block addresses, the maximum file size supported will be: a) 2.0 G b)2.01 M c)2.018 M d) 2.018 G
answered Oct 9, 2018 in Operating System 108 views
1 vote
16
Sum of Product and Product of Sum
I have a doubt it may be stupid though. know that if ∑m (1,3,5,6) then its equivalent POS form is = πM (0,2,4,7) But my doubt is say i need to represent 7, in SOP i write ABC in POS i write (A'+B'+C') ∑m (1,3,5,6) = A'B'C + A'BC+AB' ... then why we say that SOP is complement of POS and why ∑m (1,3,5,6) != πM(1,3,5,6) ? as according to above they seems to be equal.
I have a doubt it may be stupid though. know that if ∑m (1,3,5,6) then its equivalent POS form is = πM (0,2,4,7) But my doubt is say i need to represent 7, in SOP i write ABC in POS i write (A'+B'+C') ∑m (1,3,5,6) = A'B'C + A'BC+AB'C+ABC' if i take complement ... 3,5,6) then why we say that SOP is complement of POS and why ∑m (1,3,5,6) != πM(1,3,5,6) ? as according to above they seems to be equal.
answered Oct 9, 2018 in Digital Logic 84 views
0 votes
17
CO TEST
answered Oct 9, 2018 in CO and Architecture 141 views
0 votes
18
Dead lock recovery
Maximum allocation available A B C D A B C D A B C D p0 6 0 1 2 4 0 0 1 3 2 1 1 p1 2 7 5 0 1 1 0 0 p2 2 3 5 6 1 2 5 4 p3 1 6 5 3 0 6 3 3 p4 1 6 5 6 0 2 1 2 What is the total number of instances of each resource type?Find a safe sequence of given system
Maximum allocation available A B C D A B C D A B C D p0 6 0 1 2 4 0 0 1 3 2 1 1 p1 2 7 5 0 1 1 0 0 p2 2 3 5 6 1 2 5 4 p3 1 6 5 3 0 6 3 3 p4 1 6 5 6 0 2 1 2 What is the total number of instances of each resource type?Find a safe sequence of given system
answered Sep 26, 2018 in Operating System 31 views
2 votes
20
Congestion Control
answered Sep 18, 2018 in Computer Networks 40 views
2 votes
21
Assignment
How many 512×8 RAM chips are needed to provide a memory capacity of 2048 bytes
How many 512×8 RAM chips are needed to provide a memory capacity of 2048 bytes
answered Sep 18, 2018 in CO and Architecture 38 views
0 votes
22
Instructions
answered Sep 7, 2018 in CO and Architecture 59 views
0 votes
23
Cache
answered Sep 6, 2018 in CO and Architecture 101 views
1 vote
24
#made_easy_workbook
answered Sep 5, 2018 in Operating System 26 views
2 votes
25
test series
F(W,X,Y,Z) = m(0,2,5,7,8,10,12,14,15) how many essential prime implicants will be there 3 or 2 ?
F(W,X,Y,Z) = m(0,2,5,7,8,10,12,14,15) how many essential prime implicants will be there 3 or 2 ?
answered Sep 2, 2018 in Digital Logic 101 views
2 votes
26
Round Robin
In case of Round robin algorithm with time quantum = 2s, and process P1 starting at t=0 and have processes P2, P3 in queue If a process P4 arrives at t =2s, but at the same time t=2s, P1 which was executing is preempted since the quantum expires. Which process will be ... mean the waiting queue will have the order P2, P3, P4, P1 or P2, P3, P1, P4 because there is race between P4 and P1.
In case of Round robin algorithm with time quantum = 2s, and process P1 starting at t=0 and have processes P2, P3 in queue If a process P4 arrives at t =2s, but at the same time t=2s, P1 which was executing is preempted since the quantum expires. Which process will be put ... I mean the waiting queue will have the order P2, P3, P4, P1 or P2, P3, P1, P4 because there is race between P4 and P1.
answered Sep 1, 2018 in Operating System 385 views
0 votes
27
basic(operating system)
Q-1 The c.p.u is able to execute a process when the process is in which states?(more than option may be true) (a) running (b) ready (c) waiting (d) new explanation??
Q-1 The c.p.u is able to execute a process when the process is in which states?(more than option may be true) (a) running (b) ready (c) waiting (d) new explanation??
answered Aug 29, 2018 in Operating System 234 views
1 vote
28
Self Doubt : Framentation
"Whenever ther is Internal fragmentation, there is always an external fragmentation " Is this statement TRUE ?
"Whenever ther is Internal fragmentation, there is always an external fragmentation " Is this statement TRUE ?
answered Aug 27, 2018 in Operating System 93 views
3 votes
29
Doubt
L(G)={$a^mb^n$|m>n>=1} is the language context free?
L(G)={$a^mb^n$|m>n>=1} is the language context free?
answered Aug 26, 2018 in Theory of Computation 111 views
0 votes
30
Solve this Q
answered Aug 24, 2018 in Computer Networks 51 views
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