Recent activity by Shivangi Parashar 2

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1

Regular Language
Which of the following option is correct regarding dependability? A. Given a regular language R and context-free C. Is every string in R also in C, i.e., Is L(R)⊆L(C) decidable? B. Given a regular language R and context-free C. Is every string in C also in R, i.e., Is L(C)⊆L(R) decidable? C. Both (A) and (B) D. None of these

asked in Theory of Computation Jan 7, 2019

140 views

0 answers

2

Regular Language
If L ≠ ∅ and L is regular then L is the union of regular language A1, . . . , An where each Ai is accepted by a DFA with exactly one final state .Please elaborate how this statement is true.

asked in Theory of Computation Jan 7, 2019

203 views

0 answers

3

MadeEasy Test Series: Theory Of Computation - Regular Expressions

asked in Theory of Computation Dec 26, 2018

326 views

3 answers

4

Bit Map
A bit-map can be used to keep track of which blocks are free in a file-system’s partition on disk. Assuming, 1 KB block size and a disk size of 40 GB, what is the size of the bit map?

commented in Operating System Nov 28, 2018

3.8k views

1 answer

5

Paging and TLB
A translational look aside buffer is a hardware device used for speeding up the conversation from virtual address to physical address. Consider a memory management unit where a memory reference takes 500 nanoseconds; TLB (Translation Look aside Buffer) reference takes 40 ... 80%. The speed-up (in %) we gained using TLB technique compared to the pure paging with no TLB ________.

commented in Operating System Nov 27, 2018

1.2k views

1 answer

6

Operating system
A multiprocessor with 8 processors has 20 attached tape drives. There is a large number of jobs submitted to the system, and each requires 4 tape drives to complete execution. Assume that each job starts running with only 3 tape drives for a long period ... its operation. Also assume an endless supply of such jobs. The maximum number of jobs that can execute at once are _______.

asked in Operating System Nov 27, 2018

1.0k views

1 answer

7

Cache Memory
consider two-level cache hierarchies with L1 and L2 cache. Programs refer to memory 1000 times out of which 40 misses are in the L1 cache and 10 misses are in the L2 cache.If the miss penalty of L2 is 200 clock cycles,hit time of L1 is 1 clock cycle,and hit time of L2 is 15 clock cycles,the average memory access time is__________clock cycles.

commented in CO and Architecture Nov 25, 2018

955 views

1 answer

8

Speed up
Consider 3 enhancements EA, EB, and EC with speedup 30, 20, 15 respectively are applied to old system to make a new system. If enhancements EA and EB are usable for 25% of the time, then the fraction (in %) of the time must EC be used to achieve an overall speed-up of 10 is ________. (in integer form)

commented in CO and Architecture Nov 25, 2018

1.3k views

1 answer

9

cache memory
Consider a two-level memory hierarchy, L1 (cache) has an accessing time of 5 ns and main memory has an accessing time of 100 ns. Writing or updating contents takes 20 ns and 200 ns for L1 and main memory respectively. Assume L1 gives misses 20% ... instructions being read-only instructions. What is the average access time for the system (in ns) if it uses the WRITETHROUGH technique?

asked in CO and Architecture Nov 25, 2018

1.0k views

0 answers

10

Transaction

commented in Databases Oct 23, 2018

127 views

2 answers

11

Transaction

commented in Databases Oct 23, 2018

297 views

2 answers

12

Er diagram

commented in Databases Oct 22, 2018

831 views

3 answers

13

MadeEasy Test Series: Databases - Relational Algebra
Consider relation R' and S' have n' and m' tuples, respectively. Choose the best matching between List-I (Expression) and List-II (Maximum number of tuple): Soln. According to me Answer should be Option C. 1.R union S = m+n (easy nothing to say) 2. ... 2 3 3 3 5 4 3 3 3 6 Now in R natual join S = m * n So option C should suffice isn't it ?

commented in Databases Oct 22, 2018

1.9k views

0 answers

14

B + TREES

asked in Databases Oct 22, 2018

218 views

2 answers

15

Fragmentation
Consider a TCP message that contains 1024 bytes of data and 20 bytes of TCP header is passed to IP for delivery across two networks interconnected by a router (i.e., it travels from the source host to a router to the destination host). The first network has ... the IP layer at the destination for TCP message, in the best case is _________ bytes. (Assume all IP headers are 20 bytes)

answer selected in Computer Networks Oct 16, 2018

1.8k views

1 answer

16

Congestion control
Consider the effect of using slow start on a line with 10 msec round trip time. The receiver window and the size of congestion window are set to 38 KB and 36 KB respectively. Sender side threshold is set to 18 KB. After 8 transmission a timeout occurs, after time out, the time taken to send first full window of 18 KB is ________ (in msec).

commented in Computer Networks Oct 16, 2018

1.8k views

0 answers

17

Ethernet
Consider two nodes A and B on the same ethernet segment, and suppose the propagation delay between the two nodes is 225 bit times. Suppose at time both nodes A and B begin to transmit a frame. Assume both nodes transmit a 50-bit jam signal after detecting a collision. For 107 bits per set ethernet, the time at which both nodes A and B sense an idle channel is ________ μsec

asked in Computer Networks Oct 15, 2018

182 views

1 answer

18

Tcp AIMD
Consider "Additive -increase multiplicative -decrease "approach of TCP congestion control.one MSS(Maximum Segment Size)is 512B .If the TCP sender doesn't perceive the path as not congested then. What will be the congestion window size after 4RTTS provided the congestion window is assigned 1MSS initially ?

asked in Others Oct 12, 2018

3.2k views

1 answer

19

Cryptography
Using RSA key crypto system with a = 1, b = 2 etc; value for encryption if prime value are p = 7 and q = 11, the legal value for secret key is . a)69 b)49 c)49 d)119

asked in Computer Networks Oct 12, 2018

1.0k views

1 answer

20

Tcp AIMD

commented in Computer Networks Oct 11, 2018

448 views

0 answers

21

Integration

asked in Calculus Sep 29, 2018

130 views

2 answers

22

3 address code

asked in Compiler Design Sep 19, 2018

603 views

0 answers

23

Syntax directed translation

asked in Compiler Design Sep 19, 2018

232 views

1 answer

24

Cache

commented in CO and Architecture Sep 7, 2018

289 views

0 answers

25

Digital

commented in Digital Logic Sep 1, 2018

197 views

0 answers

26

Digital

asked in Digital Logic Sep 1, 2018

203 views

0 answers

27

Number of trees

asked in DS Aug 28, 2018

265 views

0 answers

28

Huffmann encoding

asked in Algorithms Aug 28, 2018

178 views

0 answers

29

Eigen vector

asked in Mathematical Logic Aug 18, 2018

95 views

0 answers

30

Eigen vector

asked in Mathematical Logic Aug 18, 2018

144 views

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