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Recent activity by Suvojit
6
answers
1
GATE IT 2007 | Question: 6, ISRO2011-25
A processor takes $12$ cycles to complete an instruction I. The corresponding pipelined processor uses $6$ stages with the execution times of $3, 2, 5, 4, 6$ and $2$ cycles respectively. What is the asymptotic speedup assuming that a very large number of instructions are to be executed? $1.83$ $2$ $3$ $6$
A processor takes $12$ cycles to complete an instruction I. The corresponding pipelined processor uses $6$ stages with the execution times of $3, 2, 5, 4, 6$ and $2$ cycl...
13.3k
views
answered
Dec 23, 2014
CO and Architecture
gateit-2007
co-and-architecture
pipelining
normal
isro2011
+
–
3
answers
2
GATE IT 2004 | Question: 47
Consider a pipeline processor with $4$ stages $S1$ to $S4$. We want to execute the following loop: for (i = 1; i < = 1000; i++) {I1, I2, I3, I4} where the time taken (in ns) by instructions $I1$ to $I4$ for stages $S1$ to $S4$ ... output of $I1$ for $i = 2$ will be available after $\text{11 ns}$ $\text{12 ns}$ $\text{13 ns}$ $\text{28 ns}$
Consider a pipeline processor with $4$ stages $S1$ to $S4$. We want to execute the following loop:for (i = 1; i < = 1000; i++) {I1, I2, I3, I4}where the time taken (in ns...
12.5k
views
answered
Dec 23, 2014
CO and Architecture
gateit-2004
co-and-architecture
pipelining
normal
+
–
2
answers
3
GATE CSE 2002 | Question: 2.7
Horizontal microprogramming: does not require use of signal decoders results in larger sized microinstructions than vertical microprogramming uses one bit for each control signal all of the above
Horizontal microprogramming:does not require use of signal decodersresults in larger sized microinstructions than vertical microprogramminguses one bit for each control ...
5.1k
views
answered
Dec 22, 2014
CO and Architecture
gatecse-2002
co-and-architecture
microprogramming
+
–
3
answers
4
GATE IT 2006 | Question: 41
The data path shown in the figure computes the number of $1s$ in the $32-bit$ input word corresponding to an unsigned even integer stored in the shift register. The unsigned counter, initially zero, is incremented if the most significant bit of the shift register is $1.$ The ... $32, 5, 010$ $5, 32, 010$ $5, 31, 011$ $5, 31, 010$
The data path shown in the figure computes the number of $1s$ in the $32-bit$ input word corresponding to an unsigned even integer stored in the shift register.The unsign...
10.1k
views
answered
Dec 22, 2014
CO and Architecture
gateit-2006
co-and-architecture
microprogramming
normal
+
–
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