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1
answer
1
Equivalence classes
Consider a regular language L over Σ={0,1} such that L contains every string which ends with "0". The number of equivalence classes in L is ______.
Consider a regular language L over Σ={0,1} such that L contains every string which ends with "0". The number of equivalence classes in L is ______.
1.3k
views
answered
Jun 11, 2018
Theory of Computation
equivalence-class
theory-of-computation
myhill-nerode
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–
2
answers
2
GATE IT 2007 | Question: 42
$(C012.25)_H - (10111001110.101)_B =$ $(135103.412)_o$ $(564411.412)_o$ $(564411.205)_o$ $(135103.205)_o$
$(C012.25)_H - (10111001110.101)_B =$$(135103.412)_o$$(564411.412)_o$$(564411.205)_o$$(135103.205)_o$
6.8k
views
answered
May 25, 2018
Digital Logic
gateit-2007
digital-logic
number-representation
normal
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–
3
answers
3
No. of P.I, ESPI,Redundant P.I, Minimal SOP, Minimal Expressions.
For the given function f(A,B,C,D)=$\sum (0,4,5,10,11,13,15)$ , find the following? 1) How many Prime Implicants are there? 2) How many Essential Prime Implicants are there? 3)How many Redundant Prime Implicants are there? 4) What is Minimal SOP? 5) How many minimal expressions are there?
For the given function f(A,B,C,D)=$\sum (0,4,5,10,11,13,15)$ , find the following?1) How many Prime Implicants are there?2) How many Essential Prime Implicants are there?...
3.2k
views
answered
May 24, 2018
Digital Logic
digital-logic
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–
4
answers
4
GATE2017 EC Digital
3.3k
views
commented
May 24, 2018
Digital Logic
digital-logic
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–
12
answers
5
GATE CSE 2015 Set 2 | Question: 48
A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is ... adder is implemented by using four full adders. The total propagation time of this $4$-bit binary adder in microseconds is ______.
A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that o...
58.2k
views
commented
May 23, 2018
Digital Logic
gatecse-2015-set2
digital-logic
adder
normal
numerical-answers
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–
1
answer
6
self doubt
a vessel contains mixture of milk and water in which water concentration is 30 percent .if 20 percent water and 30 percent milk is taken out and replaced with equal quantity of water , then quantity of water increases by what percent of initial of water in the mixture?
a vessel contains mixture of milk and water in which water concentration is 30 percent .if 20 percent water and 30 percent milk is taken out and replaced with equal ...
836
views
answered
Apr 16, 2018
2
answers
7
Threads
Since every thread can access every memory address within the process’ address space, one thread can read, write, or even wipe out another thread’s stack. I am not getting the above statement, stack is specific to a thread then how we can access other thread's stack through Process' address space?
Since every thread can access every memory address within the process’ address space, one thread can read, write, or even wipe out another thread’s stack.I am not get...
1.0k
views
commented
Apr 14, 2018
3
answers
8
ISRO-DEC2017-16
Consider the following query : $SELECT$ E.eno, $COUNT(*)$ $FROM$ Employees E $GROUP\, BY$ E.eno If an index on $eno$ is available, the query can be answered by scanning only the index if the index is only hash and clustered the index is only $B+$ tree and clustered index can be hash or $B+$ tree and clustered or non-clustered index can be hash or $B+$ tree and clustered
Consider the following query :$SELECT$ E.eno, $COUNT(*)$$FROM$ Employees E$GROUP\, BY$ E.enoIf an index on $eno$ is available, the query can be answered by scanning only ...
2.0k
views
commented
Apr 13, 2018
Databases
isrodec2017
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–
2
answers
9
ISRO-DEC2017-9
The function $f:[0,3]\rightarrow [1,29]$ defined by $f(x)=2x^{3}-15x^{2}+36x+1$ is injective and surjective surjective but not injective injective but not surjective neither injective nor surjective
The function $f:[0,3]\rightarrow [1,29]$ defined by $f(x)=2x^{3}-15x^{2}+36x+1$ isinjective and surjectivesurjective but not injectiveinjective but not surjectiveneither ...
2.6k
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commented
Apr 13, 2018
Set Theory & Algebra
isrodec2017
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–
1
answer
10
Time complexity
f(n)=Ω(n),g(n)=O(n) than what is f(n).g(n)
f(n)=Ω(n),g(n)=O(n) than what is f(n).g(n)
383
views
commented
Apr 10, 2018
Algorithms
algorithms
time-complexity
asymptotic-notation
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–
1
answer
11
time complexity
time complexity questions like : h(n)=O(n2); f(n)= O(logn); g(n)=omega(n2); what is the complexity of :::: 1. h(n)-g(n)=?? 2. h(n)-f(n)=??? elaborate plz
time complexity questions like :h(n)=O(n2);f(n)= O(logn);g(n)=omega(n2);what is the complexity of :::: 1. h(n)-g(n)=?? 2. h(...
375
views
answered
Apr 10, 2018
Algorithms
time-complexity
asymptotic-notation
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–
4
answers
12
coa
708
views
answered
Apr 7, 2018
1
answer
13
DRAM refresh operation
how we will come to know that wt overhead. means here??
how we will come to know that wt overhead. means here??
2.5k
views
answered
Apr 7, 2018
Operating System
operating-system
dram-refreshing
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–
3
answers
14
vgate
why is B wrong? as far as i know DRAM has less number of gates and hence its cheaper. but static RAM contains many gates per bit
why is B wrong? as far as i know DRAM has less number of gates and hence its cheaper. but static RAM contains many gates per bit
833
views
answered
Apr 7, 2018
2
answers
15
GATE CSE 2010 | Question: 7
The main memory unit with a capacity of $4$ $\text{megabytes}$ is built using $1\text{M} \times \text{1-bit}$ DRAM chips. Each DRAM chip has $1\text{K}$ rows of cells with $1\text{K}$ cells in each row. The time taken for a single ... in the memory unit is $100$ nanoseconds $100\times 2^{10}$ nanoseconds $100\times 2^{20}$ nanoseconds $3200\times 2^{20}$ nanoseconds
The main memory unit with a capacity of $4$ $\text{megabytes}$ is built using $1\text{M} \times \text{1-bit}$ DRAM chips. Each DRAM chip has $1\text{K}$ rows of cells wit...
18.8k
views
commented
Apr 7, 2018
Digital Logic
gatecse-2010
digital-logic
memory-interfacing
normal
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–
5
answers
16
GATE CSE 1995 | Question: 2.23
A finite state machine with the following state table has a single input $x$ and a single out $z$ ... $C$ is: $01$ $10$ $101$ $110$
A finite state machine with the following state table has a single input $x$ and a single out $z$.$$\begin{array}{|c|ll|}\hline\textbf{present state} & \qquad \textbf{nex...
11.3k
views
commented
Mar 6, 2018
Theory of Computation
gate1995
theory-of-computation
finite-automata
normal
+
–
3
answers
17
UGC NET CSE | January 2017 | Part 3 | Question: 52
Some of the criteria for calculation of priority of a process are: Processor utilization by an individual process. Weight assigned to a user or group of users Processor utilization by a user or group of processes In fair scheduler, priority is calculated based on: only (i) and (ii) only (i) and (iii) (i) ,(ii) and (iii) only (ii) and (iii)
Some of the criteria for calculation of priority of a process are:Processor utilization by an individual process.Weight assigned to a user or group of usersProcessor util...
1.2k
views
answered
Mar 3, 2018
Operating System
ugcnetcse-jan2017-paper3
operating-system
process-scheduling
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–
8
answers
18
GATE CSE 2017 Set 1 | Question: 02
Consider the first-order logic sentence $F:\forall x(\exists yR(x,y))$. Assuming non-empty logical domains, which of the sentences below are implied by $F$? $\exists y(\exists xR(x,y))$ $\exists y(\forall xR(x,y))$ $\forall y(\exists xR(x,y))$ $¬\exists x(\forall y¬R(x,y))$ IV only I and IV only II only II and III only
Consider the first-order logic sentence $F:\forall x(\exists yR(x,y))$. Assuming non-empty logical domains, which of the sentences below are implied by $F$?$\exists y(\ex...
17.1k
views
commented
Jan 27, 2018
Mathematical Logic
gatecse-2017-set1
mathematical-logic
first-order-logic
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–
9
answers
19
GATE IT 2005 | Question: 36
Let $P(x)$ and $Q(x)$ ...
Let $P(x)$ and $Q(x)$ be arbitrary predicates. Which of the following statements is always TRUE?$\left(\left(\forall x \left(P\left(x\right) \vee Q\left(x\right)\right)\r...
14.6k
views
commented
Jan 27, 2018
Mathematical Logic
gateit-2005
mathematical-logic
first-order-logic
normal
+
–
12
answers
20
GATE CSE 2017 Set 2 | Question: 39
Let $\delta$ denote the transition function and $\widehat{\delta}$ denote the extended transition function of the $\epsilon$ ... $\emptyset$ $\{q_0, q_1, q_3\}$ $\{q_0, q_1, q_2\}$ $\{q_0, q_2, q_3 \}$
Let $\delta$ denote the transition function and $\widehat{\delta}$ denote the extended transition function of the $\epsilon$-NFA whose transition table is given below:$$\...
28.1k
views
commented
Dec 12, 2017
Theory of Computation
gatecse-2017-set2
theory-of-computation
finite-automata
+
–
2
answers
21
UGC NET CSE | December 2015 | Part 3 | Question: 13
In a classful addressing the IP address with $0$(zero) as network number: refers to the current network refers to broadcast on the local network refers to the broadcast on a distant network refers to loopback testing
In a classful addressing the IP address with $0$(zero) as network number:refers to the current networkrefers to broadcast on the local networkrefers to the broadcast on a...
3.9k
views
commented
Dec 8, 2017
Computer Networks
computer-networks
network-addressing
ugcnetcse-dec2015-paper3
+
–
6
answers
22
GATE CSE 1995 | Question: 2.4
What is the value of $X$ printed by the following program? program COMPUTE (input, output); var X:integer; procedure FIND (X:real); begin X:=sqrt(X); end; begin X:=2 FIND(X); writeln(X); end. $2$ $\sqrt{2}$ Run time error None of the above
What is the value of $X$ printed by the following program?program COMPUTE (input, output); var X:integer; procedure FIND (X:real); begin X:=sqrt(X); end; begin X:=2 FIND(...
6.9k
views
commented
Nov 13, 2017
Compiler Design
gate1995
compiler-design
parameter-passing
runtime-environment
easy
+
–
7
answers
23
GATE CSE 2007 | Question: 54
In a simplified computer the instructions are: ... computation should be in memory. What is the minimum number of MOV instructions in the code generated for this basic block? $2$ $3$ $5$ $6$
In a simplified computer the instructions are:$$\begin{array}{|l|l|} \hline \text {OP }R _j , R _i & \text{Perform }R _j \text{ OP } R _i \text{ and store the result in r...
13.4k
views
answered
Oct 15, 2017
CO and Architecture
gatecse-2007
co-and-architecture
machine-instruction
normal
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–
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