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Questions by ajaysoni1924
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101
Morris Mano Edition 3 Exercise 7 Question 34 (Page No. 305)
Word number 535 in the memory shown in the figure contains the binary equivalent of 2209. List the 10 bit address and 16-bit memory content of the word.
Word number 535 in the memory shown in the figure contains the binary equivalent of 2209. List the 10 bit address and 16-bit memory content of the word.
417
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Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
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102
Morris Mano Edition 3 Exercise 7 Question 33 (Page No. 305)
The following memory units are specified by the number of words times the number of bits per word. How many address lines and Input output data lines are needed in each case given below? $2K \times 16$; $64K \times 8$; $16M \times 32$; $96K \times 12$;
The following memory units are specified by the number of words times the number of bits per word. How many address lines and Input output data lines are needed in each c...
265
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
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103
Morris Mano Edition 3 Exercise 7 Question 32 (Page No. 305)
Construct a Johnson counter for ten timing signals.
Construct a Johnson counter for ten timing signals.
451
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Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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104
Morris Mano Edition 3 Exercise 7 Question 31 (Page No. 305)
Complete the design of Johnson counter of the figure showing the output of the eight timing signals using eight AND gates.
Complete the design of Johnson counter of the figure showing the output of the eight timing signals using eight AND gates.
637
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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105
Morris Mano Edition 3 Exercise 7 Question 30 (Page No. 305)
Show the circuit and the timing diagram for generating six repeated timing signals, $T _0$ through $T _5$.
Show the circuit and the timing diagram for generating six repeated timing signals, $T _0$ through $T _5$.
191
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
digital-circuits
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106
Morris Mano Edition 3 Exercise 7 Question 29 (Page No. 305)
Add four 2-input AND gates to the circuit of the figure. One input in each gate is connected to one output of the decoder. The other input in each gate is connected to the clock. Label the outputs of the AND gate as $P _0,P _1,P _2, and P _3$. Show the timing diagram of the for P outputs.
Add four 2-input AND gates to the circuit of the figure. One input in each gate is connected to one output of the decoder. The other input in each gate is connected to th...
202
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
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107
Morris Mano Edition 3 Exercise 7 Question 28 (Page No. 305)
Using a start signal as in the figure , construct a word time control that stays on for a period of 16 clock pulses.
Using a start signal as in the figure , construct a word time control that stays on for a period of 16 clock pulses.
307
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
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108
Morris Mano Edition 3 Exercise 7 Question 27 (Page No. 305)
Using two circuits of the type shown in the figure, construct a binary counter that counts from 0 through binary 64.
Using two circuits of the type shown in the figure, construct a binary counter that counts from 0 through binary 64.
325
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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109
Morris Mano Edition 3 Exercise 7 Question 26 (Page No. 305)
Construct a mod -12 counter using the circuit specified in the figure.
Construct a mod -12 counter using the circuit specified in the figure.
381
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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110
Morris Mano Edition 3 Exercise 7 Question 25 (Page No. 305)
Construct a BCD counter using the circuit specified in the figure and a AND gate.
Construct a BCD counter using the circuit specified in the figure and a AND gate.
307
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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111
Morris Mano Edition 3 Exercise 7 Question 24 (Page No. 305)
Show the connection between four IC binary counters with the parallel load to produce a 16-bit binary counter with the parallel load. Use a block diagram for each IC.
Show the connection between four IC binary counters with the parallel load to produce a 16-bit binary counter with the parallel load. Use a block diagram for each IC.
228
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asked
Apr 6, 2019
Digital Logic
sequential-circuit
digital-logic
morris-mano
digital-counter
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112
Morris Mano Edition 3 Exercise 7 Question 23 (Page No. 304)
Design a synchronous BCD counter with JK flip-flops
Design a synchronous BCD counter with JK flip-flops
417
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
synchronous-asynchronous-circuits
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113
Morris Mano Edition 3 Exercise 7 Question 22 (Page No. 304)
verify the flip-flop input functions of the synchronous BCD counter specified in the table given below. Draw the logic diagram of the BCD counter and include a count enable control input.
verify the flip-flop input functions of the synchronous BCD counter specified in the table given below. Draw the logic diagram of the BCD counter and include a count enab...
525
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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114
Morris Mano Edition 3 Exercise 7 Question 21 (Page No. 304)
Modify the counter given in the figure so that when both the up and down control inputs are equal to 1. the counter does not change state, but remains in the same count.
Modify the counter given in the figure so that when both the up and down control inputs are equal to 1. the counter does not change state, but remains in the same count.
484
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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115
Morris Mano Edition 3 Exercise 7 Question 20 (Page No. 304)
Design a 4-bit binary synchronous counter with D flip-flops.
Design a 4-bit binary synchronous counter with D flip-flops.
181
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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116
Morris Mano Edition 3 Exercise 7 Question 19 (Page No. 304)
Design a 4-bit ripple counter with D flip-flops.
Design a 4-bit ripple counter with D flip-flops.
215
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
ripple-counter-operation
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117
Morris Mano Edition 3 Exercise 7 Question 18 (Page No. 304)
Determine the next state for each of the six unused states in the BCD ripple counter shown in the figure. Determine whether it is self-correcting.
Determine the next state for each of the six unused states in the BCD ripple counter shown in the figure. Determine whether it is self-correcting.
519
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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answer
118
Morris Mano Edition 3 Exercise 7 Question 17 (Page No. 304)
How many flip-flops will be complemented in a 10-bit binary ripple counter to reach the next count after the following count? 1001100111; 0011111111;
How many flip-flops will be complemented in a 10-bit binary ripple counter to reach the next count after the following count?1001100111;0011111111;
2.1k
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asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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119
Morris Mano Edition 3 Exercise 7 Question 16 (Page No. 304)
A flip-flop has 10 nanosecond delay from the time its CP input goes from 1 to 0 to the time the output is complemented. What is the maximum delay in the 10-bit binary ripple counter that uses these flip-flop? What is the maximum frequency the counter can operate reliably.
A flip-flop has 10 nanosecond delay from the time its CP input goes from 1 to 0 to the time the output is complemented. What is the maximum delay in the 10-bit binary rip...
331
views
asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
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1
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120
Morris Mano Edition 3 Exercise 7 Question 15 (Page No. 304)
Construct a BCD ripple counter using a 4-bit binary ripple counter that can be cleared asynchronously and an external NAND gate.
Construct a BCD ripple counter using a 4-bit binary ripple counter that can be cleared asynchronously and an external NAND gate.
350
views
asked
Apr 6, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
ripple-counter-operation
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