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Recent activity by dharmesh7
11
answers
1
GATE IT 2006 | Question: 9
In a binary tree, the number of internal nodes of degree $1$ is $5$, and the number of internal nodes of degree $2$ is $10$. The number of leaf nodes in the binary tree is $10$ $11$ $12$ $15$
In a binary tree, the number of internal nodes of degree $1$ is $5$, and the number of internal nodes of degree $2$ is $10$. The number of leaf nodes in the binary tree i...
26.1k
views
answer edited
Jan 28, 2021
DS
gateit-2006
data-structures
binary-tree
normal
+
–
6
answers
2
GATE IT 2006 | Question: 49
Which one of the choices given below would be printed when the following program is executed ? #include <stdio.h> struct test { int i; char *c; }st[] = {5, "become", 4, "better", 6, "jungle", 8, "ancestor", 7, " ... $\text{etter, u, 6, ungle}$ $\text{cetter, k, 6, jungle}$ $\text{etter, u, 8, ncestor}$
Which one of the choices given below would be printed when the following program is executed ?#include <stdio.h struct test { int i; char *c; }st[] = {5, "become", 4, "be...
27.1k
views
comment edited
Dec 15, 2020
Programming in C
gateit-2006
programming
programming-in-c
normal
structure
+
–
8
answers
3
GATE CSE 2005 | Question: 73
In a packet switching network, packets are routed from source to destination along a single path having two intermediate nodes. If the message size is $24$ bytes and each packet contains a header of $3$ bytes, then the optimum packet size is: $4$ $6$ $7$ $9$
In a packet switching network, packets are routed from source to destination along a single path having two intermediate nodes. If the message size is $24$ bytes and each...
42.6k
views
commented
Jan 28, 2019
Computer Networks
gatecse-2005
computer-networks
network-switching
normal
+
–
0
answers
4
Applied Course
Calculate the total time to transmit a 1500 KB file over a link. Assuming the one way delay in either direction is 40ms, and an initial RTT of handshaking before any data is sent.(Note: 1 KB = 210 bytes, 1 Mbps = 106 bits/s). The bandwidth is ... the packet size including the header is 1 KB of which the header is 40 bytes, and the data packets are sent continuously and never lost
Calculate the total time to transmit a 1500 KB file over a link. Assuming the one way delay in either direction is 40ms, and an initial RTT of “handshaking” before an...
625
views
commented
Jan 28, 2019
0
answers
5
MadeEasyTestSeries
Consider a system employing interrupt driven IO for a particular device that transfer data at a rate of 8KB/sec continuously. Consider interrupt processing time about 100 microsec. The fraction of processor time consumed by this IO if interrupt occurs on every byte is ______?
Consider a system employing interrupt driven IO for a particular device that transfer data at a rate of 8KB/sec continuously. Consider interrupt processing time about 100...
340
views
comment edited
Jan 25, 2019
CO and Architecture
co-and-architecture
interrupts
+
–
6
answers
6
GATE CSE 1995 | Question: 2.4
What is the value of $X$ printed by the following program? program COMPUTE (input, output); var X:integer; procedure FIND (X:real); begin X:=sqrt(X); end; begin X:=2 FIND(X); writeln(X); end. $2$ $\sqrt{2}$ Run time error None of the above
What is the value of $X$ printed by the following program?program COMPUTE (input, output); var X:integer; procedure FIND (X:real); begin X:=sqrt(X); end; begin X:=2 FIND(...
7.1k
views
commented
Jan 22, 2019
Compiler Design
gate1995
compiler-design
parameter-passing
runtime-environment
easy
+
–
1
answer
7
self doubt
what is the time complexity to construct binary search tree when preorder and postorder of tree given? answer given is O(n) but i think it will be nlogn...becz from given postorder or preorder we need to find in order by sortingin nlogn tum so I think overalltime complexity will be nlogn ..???
what is the time complexity to construct binary search tree when preorder and postorder of tree given?answer given is O(n)but i think it will be nlogn...becz from given p...
807
views
commented
Jan 18, 2019
DS
data-structures
binary-search-tree
time-complexity
+
–
0
answers
8
Madeeasy Test Series
S: r1(A) w1(B) r2(A) w2(B) r3(A) w3(B) Total number of schedules that are view equivalent to S are_________
S: r1(A) w1(B) r2(A) w2(B) r3(A) w3(B)Total number of schedules that are view equivalent to S are_________
171
views
commented
Jan 18, 2019
0
answers
9
Madeeasy-TestSeries
A leaky Bucket with capacity 200MB is at host network interface. The data rate on the network is 2MBps. If the Host has 450 MB to send on the network and it sends data in a burst, then the maximum data speed from the host in order that no data is lost is ______MBps
A leaky Bucket with capacity 200MB is at host network interface. The data rate on the network is 2MBps. If the Host has 450 MB to send on the network and it sends data in...
251
views
comment edited
Jan 18, 2019
4
answers
10
GATE CSE 2018 | Question: 41
Consider the relations $r(A, B)$ and $s(B, C)$, where $s.B$ is a primary key and $r.B$ is a foreign key referencing $s.B$. Consider the query $Q: r \bowtie (\sigma_{B<5} (s))$ Let LOJ denote the natural left outer-join operation. Assume that $r$ and $s$ contain no null ... $r \: LOJ \: (\sigma_{B<5} (s))$ $\sigma_{B<5} (r) \: LOJ \: s$
Consider the relations $r(A, B)$ and $s(B, C)$, where $s.B$ is a primary key and $r.B$ is a foreign key referencing $s.B$. Consider the query$Q: r \bowtie (\sigma_{B<5} (...
15.7k
views
commented
Jan 18, 2019
Databases
gatecse-2018
databases
relational-algebra
normal
2-marks
+
–
0
answers
11
Madeeasy-Testseries
In a RSA cryptosystem a participant uses two prime numbers p and q is 17 and 11 respectively to generate his/her public and private keys...If the public keybof participant is 7 and cipher text C is 11 then the original message M is_________
In a RSA cryptosystem a participant uses two prime numbers p and q is 17 and 11 respectively to generate his/her public and private keys...If the public keybof participan...
456
views
commented
Jan 15, 2019
0
answers
12
Applied Course
Consider a computer system in which cache memory write hit takes 5ns and and miss takes 80ns. Cache memory read hit takes 2ns and miss takes 40ns. The cache is having 95% hit. The system received 1000 instructions out of which, 700 operand fetch operations and 300 operand write operations. The average time taken ... 2+ (1-h1)*40 = 2 + (0.05)*4 OR h1*2+ (1-h1)*40 =0.95*2+(0.05)*40 ?
Consider a computer system in which cache memory write hit takes 5ns and and miss takes 80ns. Cache memory read hit takes 2ns and miss takes 40ns. The cache is having 95%...
849
views
commented
Jan 15, 2019
CO and Architecture
co-and-architecture
cache-memory
+
–
3
answers
13
ISI2015-PCB-CS-6-b
Consider scheduling $n$ processes $P_1, P_2, \dots, P_n$ which are created in this order at almost the same instant. Assume that all processes have exactly one CPU burst of duration $D$ units (and no I/O bursts). Compute the average waiting time ... to switch from one running process to another and $\Delta$ units of time to switch from a terminated process to a running process.
Consider scheduling $n$ processes $P_1, P_2, \dots, P_n$ which are created in this order at almost the same instant. Assume that all processes have exactly one CPU burst ...
2.6k
views
commented
Jan 13, 2019
Operating System
descriptive
isi2015-pcb-cs
operating-system
process-scheduling
+
–
2
answers
14
GATE CSE 1993 | Question: 6.4, ISRO2008-14
Assume that each character code consists of $8$ bits. The number of characters that can be transmitted per second through an asynchronous serial line at $2400$ baud rate, and with two stop bits is $109$ $216$ $218$ $219$
Assume that each character code consists of $8$ bits. The number of characters that can be transmitted per second through an asynchronous serial line at $2400$ baud rate,...
10.8k
views
commented
Jan 13, 2019
Computer Networks
gate1993
computer-networks
serial-communication
normal
isro2008
out-of-gate-syllabus
+
–
3
answers
15
GATE CSE 2018 | Question: 23
A $32\text{-bit}$ wide main memory unit with a capacity of $1\;\textsf{GB}$ is built using $256\textsf{M} \times 4\text{-bit}$ DRAM chips. The number of rows of memory cells in the DRAM chip is $2^{14}$. The ... The percentage (rounded to the closest integer) of the time available for performing the memory read/write operations in the main memory unit is _________.
A $32\text{-bit}$ wide main memory unit with a capacity of $1\;\textsf{GB}$ is built using $256\textsf{M} \times 4\text{-bit}$ DRAM chips. The number of rows of memory ce...
25.8k
views
commented
Jan 11, 2019
CO and Architecture
gatecse-2018
co-and-architecture
memory-interfacing
normal
numerical-answers
1-mark
+
–
8
answers
16
GATE CSE 2018 | Question: 15
Two people, $P$ and $Q$, decide to independently roll two identical dice, each with $6$ faces, numbered $1$ to $6$. The person with the lower number wins. In case of a tie, they roll the dice repeatedly until there is no tie. Define a ... and that all trials are independent. The probability (rounded to $3$ decimal places) that one of them wins on the third trial is ____
Two people, $P$ and $Q$, decide to independently roll two identical dice, each with $6$ faces, numbered $1$ to $6$. The person with the lower number wins. In case of a ti...
11.0k
views
commented
Jan 10, 2019
Probability
gatecse-2018
probability
normal
numerical-answers
1-mark
+
–
1
answer
17
Peterson Davie 2.36a
(Figure 2.37) Suppose $A$ is connected to $B$ via an intermediate router $R$, as shown in Figure 2.37. The $A - R$ and $R - B$ links each accept and transmit only one packet per second in each direction (so two packets take $2$ seconds), and the two directions ... $0,1,2,3,4,5$, state what packets arrive at and leave each node, or label them on a timeline.
(Figure 2.37)Suppose $A$ is connected to $B$ via an intermediate router $R$, as shown in Figure 2.37. The $A - R$ and $R - B$ links each accept and transmit only one pack...
592
views
answered
Jan 10, 2019
Computer Networks
peterson-davie
+
–
3
answers
18
GATE CSE 2008 | Question: 29
Let $X$ be a random variable following normal distribution with mean $+1$ and variance $4$. Let $Y$ be another normal variable with mean $-1$ and variance unknown. If $P (X \leq -1) = P (Y \geq 2)$ , the standard deviation of $Y$ is $3$ $2$ $\sqrt{2}$ $1$
Let $X$ be a random variable following normal distribution with mean $+1$ and variance $4$. Let $Y$ be another normal variable with mean $-1$ and variance unknown. If $P ...
23.6k
views
commented
Jan 10, 2019
Probability
gatecse-2008
random-variable
normal-distribution
probability
normal
+
–
9
answers
19
GATE CSE 2005 | Question: 51
Box $P$ has $2$ red balls and $3$ blue balls and box $Q$ has $3$ red balls and $1$ blue ball. A ball is selected as follows: (i) select a box (ii) choose a ball from the selected box such that each ball in the box is equally likely to be chosen. The probabilities ... that it came from the box $P$ is: $\dfrac{4}{19}$ $\dfrac{5}{19}$ $\dfrac{2}{9}$ $\dfrac{19}{30}$
Box $P$ has $2$ red balls and $3$ blue balls and box $Q$ has $3$ red balls and $1$ blue ball. A ball is selected as follows: (i) select a box (ii) choose a ball from the ...
5.9k
views
commented
Jan 10, 2019
Probability
gatecse-2005
probability
conditional-probability
normal
+
–
5
answers
20
GATE CSE 2002 | Question: 15
A university placement center maintains a relational database of companies that interview students on campus and make job offers to those successful in the interview. The schema of the database is given below: ... students were offered jobs, the name of the degree and the average offered salary of students in this degree program.
A university placement center maintains a relational database of companies that interview students on campus and make job offers to those successful in the interview. The...
5.5k
views
comment reshown
Jan 9, 2019
Databases
gatecse-2002
databases
normal
descriptive
relational-algebra
sql
+
–
2
answers
21
view-serializablity
Draw the polygraph and explain whether it is view-serializable or not?
Draw the polygraph and explain whether it is view-serializable or not?
608
views
commented
Jan 6, 2019
Databases
view-serializable
databases
serializability
+
–
0
answers
22
Compiler Syllabus2019
Do we have to study control flow graph and activation record for GATE2019 ?
Do we have to study control flow graph and activation record for GATE2019 ?
124
views
asked
Jan 3, 2019
3
answers
23
GATE IT 2006 | Question: 41
The data path shown in the figure computes the number of $1s$ in the $32-bit$ input word corresponding to an unsigned even integer stored in the shift register. The unsigned counter, initially zero, is incremented if the most significant bit of the shift register is $1.$ The ... $32, 5, 010$ $5, 32, 010$ $5, 31, 011$ $5, 31, 010$
The data path shown in the figure computes the number of $1s$ in the $32-bit$ input word corresponding to an unsigned even integer stored in the shift register.The unsign...
10.1k
views
comment edited
Jan 2, 2019
CO and Architecture
gateit-2006
co-and-architecture
microprogramming
normal
+
–
1
answer
24
write down Domain Relational Calculas query?
employee(person-name,street,city) works(person-name,company-name,salary) company(company-name,city) manages(person-name,manager-name) Find all employees who earn more than every employee of small bank co-operation
employee(person-name,street,city)works(person-name,company-name,salary)company(company-name,city)manages(person-name,manager-name) Find all employees who earn more than e...
1.1k
views
comment edited
Dec 28, 2018
Databases
databases
relational-calculus
+
–
6
answers
25
GATE CSE 2016 Set 2 | Question: 37
Consider the following program: int f (int * p, int n) { if (n <= 1) return 0; else return max (f (p+1, n-1), p[0] - p[1]); } int main () { int a[] = {3, 5, 2, 6, 4}; printf(" %d", f(a, 5)); } Note: $\max (x, y)$ returns the maximum of $x$ and $y$. The value printed by this program is ________.
Consider the following program:int f (int * p, int n) { if (n <= 1) return 0; else return max (f (p+1, n-1), p[0] - p ); } int main () { int a[] = {3, 5, 2, 6, 4}; ...
13.6k
views
comment edited
Dec 27, 2018
Programming in C
gatecse-2016-set2
programming-in-c
normal
numerical-answers
recursion
+
–
10
answers
26
GATE CSE 2007 | Question: 80
Consider a machine with a byte addressable main memory of $2^{16}$ bytes. Assume that a direct mapped data cache consisting of $32$ lines of $64$ bytes each is used in the system. A $50 \times 50$ two-dimensional array of bytes is stored in the main ... data cache do not change in between the two accesses. How many data misses will occur in total? $48$ $50$ $56$ $59$
Consider a machine with a byte addressable main memory of $2^{16}$ bytes. Assume that a direct mapped data cache consisting of $32$ lines of $64$ bytes each is used in th...
32.5k
views
answered
Dec 22, 2018
CO and Architecture
gatecse-2007
co-and-architecture
cache-memory
normal
+
–
13
answers
27
GATE CSE 2004 | Question: 82
Let $A[1,\ldots,n]$ be an array storing a bit ($1$ or $0$) at each location, and $f(m)$ is a function whose time complexity is $\Theta(m)$. Consider the following program fragment written in a C like language: counter = 0; for (i=1; i<=n; i++) { if ( ... The complexity of this program fragment is $\Omega(n^2)$ $\Omega (n\log n) \text{ and } O(n^2)$ $\Theta(n)$ $o(n)$
Let $A[1,\ldots,n]$ be an array storing a bit ($1$ or $0$) at each location, and $f(m)$ is a function whose time complexity is $\Theta(m)$. Consider the following program...
20.2k
views
comment edited
Dec 13, 2018
Algorithms
gatecse-2004
algorithms
time-complexity
normal
+
–
3
answers
28
Test by Bikram | Computer Organization and Architecture | Test 1 | Question: 11
A system has $3$ levels of cache i.e., $L_1, L_2$ and $L_3.$ The access times of $L_1,L_2$ and $L_3$ cache memories are $100$ ns/word, $150$ ns/word and $250$ ns/word, respectively. $L_1, L_2$ ... until a complete memory block gets transferred, what is the average access time? $103$ ns $220$ ns $150$ ns $135$ ns
A system has $3$ levels of cache i.e., $L_1, L_2$ and $L_3.$ The access times of $L_1,L_2$ and $L_3$ cache memories are $100$ ns/word, $150$ ns/word and $250$ ns/word, re...
1.1k
views
comment reshown
Dec 10, 2018
CO and Architecture
tbb-coa-1
co-and-architecture
cache-memory
multilevel-cache
+
–
3
answers
29
Test by Bikram | Computer Organization and Architecture | Test 1 | Question: 22
Consider a hypothetical processor that supports two addresses -- one address and zero address instructions. It has a $256$ word memory, and a $20$ bit instruction is placed in $1$ word of ... instructions and $1984$ one address instructions, then the total number of zero address instructions formulated are _______.
Consider a hypothetical processor that supports two addresses one address and zero address instructions. It has a $256$ word memory, and a $20$ bit instruction is place...
445
views
comment edited
Nov 23, 2018
CO and Architecture
tbb-coa-1
co-and-architecture
instruction-format
numerical-answers
+
–
2
answers
30
Test by Bikram | Computer Organization and Architecture | Test 1 | Question: 10
Registers $R1$ and $R2$ of a computer contain the decimal values $1300$ and $4500$. The following instructions are run: $\text{ Load 20(R1),R5}$ $\text{Move #3000,R5}$ $\text{Store R5,30(R1,R2)}$ The effective address of the memory operand is ___________.
Registers $R1$ and $R2$ of a computer contain the decimal values $1300$ and $4500$. The following instructions are run:$\text{ Load 20(R1),R5}$$\text{Move #3000,R5}$$\tex...
734
views
comment edited
Nov 20, 2018
CO and Architecture
tbb-coa-1
co-and-architecture
machine-instruction
numerical-answers
+
–
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