Recent activity by hetgate23 / GATE Overflow for GATE CSE

3 answers

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678 views

commented Jul 13, 2023

1 answer

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GATE CSE 2023 | Memory Based Question: 46
A link is point-to-point connected and using stop and wait protocol, which of the following correctly states lowest link utilization. Lower link length and lower transmission rate. Lower link length and higher transmission rate. Higher link length and lower transmission rate. Higher link length and higher transmission rate.

A link is point-to-point connected and using stop and wait protocol, which of the following correctly states lowest link utilization.Lower link length and lower transmiss...

1.8k views

commented Feb 9, 2023

1 answer

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GO Classes Test Series 2023 | CO and Architecture | Test 2 | Question: 8
Consider the following instruction sequence: ... , then which of the following is true? $\mathrm{B}=4$ $\mathrm{A}=4$ $\mathrm{A}=2$ $\mathrm{C}=2$

Consider the following instruction sequence:$$\begin{aligned}&\text{I}_1: \text{R}_1=100\\&\text{I}_2: \text{R}_1=\text{R}_2+\text{R}_4\\&\text{I}_3: \text{R}_2=\text{R}_...

487 views

commented Dec 28, 2022

3 answers

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GO Classes Test Series 2023 | Calculus | Test 1 | Question: 7
Let $q(x)$ be a continuous function which is defined for all real numbers. A portion of the graph of $q^{\prime}(x)$, the derivative of $q(x)$, is shown below. On which of the following interval(s) is $q(x)$ increasing? $(0,2)$ $(2,4)$ $(7,9)$ None of these

Let $q(x)$ be a continuous function which is defined for all real numbers. A portion of the graph of $q^{\prime}(x)$, the derivative of $q(x)$, is shown below.On which of...

848 views

commented Dec 14, 2022

4 answers

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GATE CSE 1996 | Question: 25
A hard disk is connected to a $50$ MHz processor through a DMA controller. Assume that the initial set-up of a DMA transfer takes $1000$ clock cycles for the processor, and assume that the handling of the interrupt at DMA completion requires $500$ ... What fraction of the processor time is consumed by the disk, if the disk is actively transferring $100\%$ of the time?

A hard disk is connected to a $50$ MHz processor through a DMA controller. Assume that the initial set-up of a DMA transfer takes $1000$ clock cycles for the processor, ...

10.3k views

comment edited Nov 23, 2022

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Is priority inversion problem a case of deadlock?
I have read in some notes that priority inversion problem is a case of spin lock, not deadlock because in deadlock the processes are in blocked state, but here the processes are busy waiting and consuming memory. I have also read in a note ... different states. Which one of this is true? Is this problem a case of spin-lock or live lock or deadlock?

I have read in some notes that priority inversion problem is a case of spin lock, not deadlock because in deadlock the processes are in blocked state, but here the proces...

1.5k views

commented Nov 6, 2022

1 answer

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Ace Test Series Data Structure Q9
Which data structure would be most appropriate to implement a collection of values with the following 3 characteristics Singly link list with head and tail pointer Doubly link list with only head pointer Binary tree Array

Which data structure would be most appropriate to implement a collection of values with the following 3 characteristicsSingly link list with head and tail pointerDoubly l...

876 views

commented Nov 5, 2022

4 answers

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GATE CSE 1999 | Question: 2.11
Which of the following is/are advantage(s) of virtual memory? Faster access to memory on an average. Processes can be given protected address spaces. Linker can assign addresses independent of where the program will be loaded in physical memory. Program larger than the physical memory size can be run.

Which of the following is/are advantage(s) of virtual memory?Faster access to memory on an average.Processes can be given protected address spaces.Linker can assign addre...

14.0k views

commented Nov 4, 2022

1 answer

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Madeeasy Test Series 2023
Answer: 1.098

Answer: 1.098

507 views

answered Oct 27, 2022

1 answer

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input-output
Consider a system employing interrupt-driven I/O for a particular device that transfers data at an average of 8 KB/s on a continuous basis. Assume that interrupt processing takes about 100 microsecond (i.e., the time to jump to the interrupt service routine (ISR), ... by this I/O device if it interrupts for every byte. Is it same as percentage of time CPU is in blocked state ?

Consider a system employing interrupt-driven I/O for a particular device that transfers data at an average of 8 KB/s on a continuous basis. Assume that interrupt processi...

7.0k views

commented Oct 4, 2022

9 answers

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GATE CSE 2019 | Question: 25
Consider a sequence of $14$ elements: $A=[-5, -10, 6, 3, -1, -2, 13, 4, -9, -1, 4, 12, -3, 0]$. The sequence sum $S(i,j) = \Sigma_{k=i}^j A[k]$. Determine the maximum of $S(i,j)$, where $0 \leq i \leq j <14$. (Divide and conquer approach may be used.) Answer: ___________

Consider a sequence of $14$ elements: $A=[-5, -10, 6, 3, -1, -2, 13, 4, -9, -1, 4, 12, -3, 0]$. The sequence sum $S(i,j) = \Sigma_{k=i}^j A[k]$. Determine the maximum of ...

19.3k views

commented Sep 17, 2022

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