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Answers by kvkumar
0
votes
91
MadeEasy Test Series: Algorithms - Graph Algorithms
Which of the following statements is/are true? S1: Dijkstra’s algorithm is not affected by negative edge weight cycles in the graph and gives correct shortest path. S2: Bellman ford algorithm finds all negative edge weight cycles present in the graph. a) Only S2 b) Only S1 c) Both S1 and S2 d) Neither S1 and nor S2
Which of the following statements is/are true?S1: Dijkstra’s algorithm is not affected by negative edge weight cycles in the graph and gives correct shortest path.S2: B...
1.2k
views
answered
Jun 2, 2016
Algorithms
algorithms
graph-algorithms
made-easy-test-series
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–
2
votes
92
UGC NET CSE | December 2013 | Part 3 | Question: 54
The essential difference between traps and interrupts is traps are asynchronous and interrupts are synchronous with the program. traps are synchronous and interrupts are asynchronous with the program. traps are synchronous and interrupts are asynchronous with the I/O devices. None of these
The essential difference between traps and interrupts istraps are asynchronous and interrupts are synchronous with the program.traps are synchronous and interrupts are as...
1.8k
views
answered
Jun 2, 2016
CO and Architecture
ugcnetcse-dec2013-paper3
microprocessors
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–
0
votes
93
schema , subschema
what is schema an subschema in dbms a subschema can be used to a)create very different , personalized views of the same data b) hide sensitive information by omitting fields from the subschema's description c)present info'n in various formats d)none e)all
what is schema an subschema in dbms a subschema can be used to a)create very different , personalized views of the same datab) hide sensitive information by omitting fie...
609
views
answered
Jun 2, 2016
0
votes
94
Let me know <concept > for output of nested aggregation function as : select max(min(price)) from Products ?
I have read in theory that multiple aggregation = innermost aggregation ,So I was expecting result as min(price)BUTwhen I run this program on www.w3school.com <SQL ...
410
views
answered
Jun 2, 2016
Databases
databases
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–
1
votes
95
operator grammar
Q). Consider the following operator grammar $S \rightarrow BbA\mid bA \mid bBA$ $B \rightarrow b \mid c$ $A \rightarrow a $ Which of the following precedence relation is correct from above grammar? Assume $x<y$ is used to represent $y$ has highest precedence than $x$ and in expression $y$ ... $a <- b$ b). $c < a$ c). Both (a) and (b) d). None of these.
Q). Consider the following operator grammar $S \rightarrow BbA\mid bA \mid bBA$ $B \rightarrow b \mid c$ $A \rightarrow a $Which of the following precedenc...
3.5k
views
answered
Jun 2, 2016
Compiler Design
compiler-design
operator-grammar
operator-precedence
test-series
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–
1
votes
96
ISRO2008-21
The advantage of MOS devices over bipolar devices is that it allows higher bit densities and also cost effective it is easy to fabricate it is higher-impedance and operational speed all of these
The advantage of MOS devices over bipolar devices is thatit allows higher bit densities and also cost effectiveit is easy to fabricateit is higher-impedance and operation...
2.8k
views
answered
Jun 2, 2016
Integrated Circuits
isro2008
non-gate
integrated-circuits
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–
1
votes
97
dbms
254
views
answered
Jun 2, 2016
2
votes
98
ER diagram
if anyone got this then plz explain me as well..
if anyone got this then plz explain me as well..
566
views
answered
Jun 2, 2016
Databases
er-diagram
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–
5
votes
99
How to prove if a boolean function is functionally complete?
17.1k
views
answered
Jun 2, 2016
Digital Logic
functional-completeness
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–
0
votes
100
Which of the following is true for the left recursive grammar
6.3k
views
answered
Jun 2, 2016
Compiler Design
compiler-design
parsing
grammar
test-series
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–
0
votes
101
dbms
211
views
answered
Jun 2, 2016
0
votes
102
dbms
263
views
answered
Jun 2, 2016
1
votes
103
silly window syndrome is related to
5.3k
views
answered
Jun 2, 2016
0
votes
104
For a class C network if IP address of a computer is 200.99.39.112 and subnet mask is 255.255.255.224
For a class C network if IP address of a computer is 200.99.39.112 and subnet mask is 255.255.255.224 the first host of first subnet (represent last octet) is ________. M...
4.1k
views
answered
Jun 2, 2016
Computer Networks
computer-networks
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–
0
votes
105
GATE CSE 2008 | Question: 82
Consider the following $\text{ER}$ diagram The minimum number of tables needed to represent $M$, $N$, $P$, $R1$, $R2$ is $2$ $3$ $4$ $5$
Consider the following $\text{ER}$ diagramThe minimum number of tables needed to represent $M$, $N$, $P$, $R1$, $R2$ is$2$$3$$4$$5$
26.2k
views
answered
Jun 2, 2016
Databases
gatecse-2008
databases
er-diagram
normal
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–
0
votes
106
If subnet mask 255.255.255.224, which of the following will be Direct Broadcast address ?
1. 202.15.19.127 2. 202.15.19.63 3. All of the above 4. None
1. 202.15.19.1272. 202.15.19.633. All of the above4. None
5.0k
views
answered
Jun 2, 2016
0
votes
107
dbms
343
views
answered
Jun 2, 2016
0
votes
108
dbms
1. Consider a relation R(ABCD) with candidate keys AB and BC then the number of super keys. of R is __________ a) 8 b) 16 c) 6 d) 10
1. Consider a relation R(ABCD) with candidate keys AB and BC then the number of super keys. of Ris __________a) 8 b) 16 c) 6 d) 10
423
views
answered
Jun 1, 2016
2
votes
109
ISRO2014-34
How much memory is required to implement $z$-buffer algorithm for a $512 \times 512 \times 24$ bit-plane image? $768$ KB $1$ MB $1.5$ MB $2$ MB
How much memory is required to implement $z$-buffer algorithm for a $512 \times 512 \times 24$ bit-plane image?$768$ KB$1$ MB$1.5$ MB$2$ MB
5.3k
views
answered
May 31, 2016
Computer Graphics
non-gate
computer-graphics
isro2014
+
–
53
votes
110
GATE IT 2005 | Question: 78
Consider the following message $M = 1010001101$. The cyclic redundancy check (CRC) for this message using the divisor polynomial $x^5+x^4+x^2+1$ is : $01110$ $01011$ $10101$ $10110$
Consider the following message $M = 1010001101$. The cyclic redundancy check (CRC) for this message using the divisor polynomial $x^5+x^4+x^2+1$ is :$01110$$01011$$10101$...
19.3k
views
answered
May 25, 2016
Computer Networks
gateit-2005
computer-networks
crc-polynomial
normal
+
–
1
votes
111
ISRO2015-61
The contents of the flag register after execution of the following program by $8085$ microprocessor will be $\textbf{Program}$ $\textsf{SUB A}$ $\textsf{MVI B,(01)}_\textsf{H}$ $\textsf{DCR B}$ $\textsf{HLT}$ $(54)_\textsf{H}$ $(00)_\textsf{H}$ $(01)_\textsf{H}$ $(45)_\textsf{H}$
The contents of the flag register after execution of the following program by $8085$ microprocessor will be$\textbf{Program}$$\textsf{SUB A}$$\textsf{MVI B,(01)}_\textsf{...
10.1k
views
answered
May 24, 2016
CO and Architecture
8085-microprocessor
non-gate
isro2015
+
–
0
votes
112
pls suggest me some books of engg. mathematics for conceptual study .
664
views
answered
May 24, 2016
0
votes
113
isro
690
views
answered
May 21, 2016
0
votes
114
Ambiguous Grammar
If a grammar is both left and right recursive then it is 1) Definitely Ambiguous 2) May or may not be ambiguous 3) Data insufficient 4) Unambiguous Please give the general answer..not by an example..!!
If a grammar is both left and right recursive then it is 1) Definitely Ambiguous 2) May or may not be ambiguous3) Data insufficient4) Unambiguous Please give the general ...
648
views
answered
May 17, 2016
2
votes
115
UGC NET CSE | December 2013 | Part 3 | Question: 52
Serial access memories are useful in applications where Data consists of numbers Short access time is required Each stored word is processed differently. None of these
Serial access memories are useful in applications whereData consists of numbersShort access time is requiredEach stored word is processed differently.None of these
1.8k
views
answered
May 17, 2016
CO and Architecture
ugcnetcse-dec2013-paper3
co-and-architecture
+
–
0
votes
116
ISRO2015-62
The minimum time delay between the initiation of two independent memory operations is called Access time Cycle time Rotational time Latency time
The minimum time delay between the initiation of two independent memory operations is calledAccess timeCycle timeRotational timeLatency time
6.8k
views
answered
May 17, 2016
CO and Architecture
isro2015
co-and-architecture
memory-management
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–
0
votes
117
logical address comes is who many bytes
284
views
answered
May 9, 2016
0
votes
118
how can 3 input nand gate used as inverter
1.4k
views
answered
May 8, 2016
0
votes
119
GATE CSE 1997 | Question: 2.5
An N-bit carry lookahead adder, where $N$ is a multiple of $4$, employs ICs $74181$ ($4$ bit ALU) and $74182$ ( $4$ bit carry lookahead generator). The minimum addition time using the best architecture for this adder is proportional to $N$ proportional to $\log N$ a constant None of the above
An N-bit carry lookahead adder, where $N$ is a multiple of $4$, employs ICs $74181$ ($4$ bit ALU) and $74182$ ( $4$ bit carry lookahead generator).The minimum addition ti...
9.5k
views
answered
May 8, 2016
Digital Logic
gate1997
digital-logic
normal
adder
+
–
2
votes
120
#Regular Expression
The regular expression 0*(10*)* denotes the same set as (A) (1*0)*1* (B) 0 + (0 + 10)* (C) (0 + 1)* 10(0 + 1)* (D) none of these
The regular expression 0*(10*)* denotes the same set as(A) (1*0)*1*(B) 0 + (0 + 10)*(C) (0 + 1)* 10(0 + 1)*(D) none of these
2.5k
views
answered
Apr 14, 2016
Theory of Computation
theory-of-computation
regular-expression
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