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Recent activity by mrinmoyh
6
answers
1
GATE CSE 2021 Set 2 | Question: 5
Which one of the following circuits implements the Boolean function given below? $f(x,y,z) = m_0+m_1+m_3+m_4+m_5+m_6$, where $m_i$ is the $i^{\text{th}}$ minterm.
Which one of the following circuits implements the Boolean function given below?$f(x,y,z) = m_0+m_1+m_3+m_4+m_5+m_6$, where $m_i$ is the $i^{\text{th}}$ minterm.
9.0k
views
commented
Mar 19, 2021
Digital Logic
gatecse-2021-set2
digital-logic
combinational-circuit
multiplexer
1-mark
+
–
2
answers
2
GATE Overflow | Algorithms | Test 1 | Question: 3
For the following program fragment, the running time is given by sum = 0; for(i = 1; i< n ; i++) for(j = 1; j<i; j++) if(i < j == 0) for(k = 0; k<j; k++) sum++; $\Theta(1)$ $\Theta(n)$ $\Theta \left(n^2\right)$ $\Theta\left(n^3\right)$
For the following program fragment, the running time is given bysum = 0; for(i = 1; i< n ; i++) for(j = 1; j<i; j++) if(i < j == 0) for(k = 0; k<j; k++) sum++;$\Theta(1)$...
869
views
commented
Jan 9, 2021
Algorithms
go-alogrithms-1
algorithms
time-complexity
programming-in-c
+
–
1
answer
3
GATE CSE 2009 | Question: 45
Let $R$ and $S$ be relational schemes such that $R=\{a,b,c\}$ and $S=\{c\}.$ Now consider the following queries on the database: $\pi_{R-S}(r) - \pi_{R-S} \left (\pi_{R-S} (r) \times s - \pi_{R-S,S}(r)\right )$ ... a,R.b From R,S Where R.c = S.c Which of the above queries are equivalent? $1$ and $2$ $1$ and $3$ $2$ and $4$ $3$ and $4$
Let $R$ and $S$ be relational schemes such that $R=\{a,b,c\}$ and $S=\{c\}.$ Now consider the following queries on the database:$\pi_{R-S}(r) - \pi_{R-S} \left (\pi_{R-S}...
24.5k
views
commented
Jan 3, 2021
Databases
gatecse-2009
databases
relational-calculus
difficult
+
–
6
answers
4
GATE CSE 2005 | Question: 79
Consider the following data path of a $\text{CPU}.$ The $\text{ALU},$ the bus and all the registers in the data path are of identical size. All operations including incrementation of the $\text{PC}$ and the $\text{GPRs}$ are to be carried out in the ... $2$ $3$ $4$ $5$
Consider the following data path of a $\text{CPU}.$The $\text{ALU},$ the bus and all the registers in the data path are of identical size. All operations including increm...
24.2k
views
comment edited
Dec 21, 2020
CO and Architecture
gatecse-2005
co-and-architecture
machine-instruction
data-path
normal
+
–
3
answers
5
GATE CSE 2008 | Question: 59
A client process P needs to make a TCP connection to a server process S. Consider the following situation: the server process S executes a $\text{socket()}$, a $\text{bind()}$ and a $\text{listen()}$ system call in that order, following which ... $\text{connect()}$ system call returns an error $\text{connect()}$ system call results in a core dump
A client process P needs to make a TCP connection to a server process S. Consider the following situation: the server process S executes a $\text{socket()}$, a $\text{bin...
16.6k
views
commented
Dec 14, 2020
Computer Networks
gatecse-2008
computer-networks
sockets
normal
+
–
9
answers
6
GATE CSE 2020 | Question: 39
Which one of the following predicate formulae is NOT logically valid? Note that $W$ is a predicate formula without any free occurrence of $x$. $\forall x (p(x) \vee W) \equiv \forall x \: ( px) \vee W$ ... $\exists x(p(x) \rightarrow W) \equiv \forall x \: p(x) \rightarrow W$
Which one of the following predicate formulae is NOT logically valid?Note that $W$ is a predicate formula without any free occurrence of $x$.$\forall x (p(x) \vee W) \equ...
16.9k
views
commented
Dec 2, 2020
Mathematical Logic
gatecse-2020
first-order-logic
mathematical-logic
2-marks
+
–
1
answer
7
Morris Mano Edition 3 Exercise 7 Question 17 (Page No. 304)
How many flip-flops will be complemented in a 10-bit binary ripple counter to reach the next count after the following count? 1001100111; 0011111111;
How many flip-flops will be complemented in a 10-bit binary ripple counter to reach the next count after the following count?1001100111;0011111111;
2.1k
views
commented
Nov 29, 2020
Digital Logic
digital-logic
morris-mano
sequential-circuit
digital-counter
+
–
3
answers
8
RAM Chip
A RAM chip has 7 address line , 8 data lines and 2 chips select lines. Then the number of memory locations is ... a. 2^12 b.2^10 c.2^19 d.2^13 Plz describe with a proper diagram and significance of each lines.
A RAM chip has 7 address line , 8 data lines and 2 chips select lines. Then the number of memory locations is ...a. 2^12b.2^10c.2^19d.2^13Plz describe with a proper diagr...
5.9k
views
commented
Nov 2, 2020
CO and Architecture
co-and-architecture
+
–
5
answers
9
GATE CSE 2011 | Question: 64
A transporter receives the same number of orders each day. Currently, he has some pending orders (backlog) to be shipped. If he uses $7$ trucks, then at the end of the $4^{th}$ day he can clear all the orders. Alternatively, if he uses only $3$ trucks, then all ... of trucks required so that there will be no pending order at the end of $5^{th}$ day? $4$ $5$ $6$ $7$
A transporter receives the same number of orders each day. Currently, he has some pending orders (backlog) to be shipped. If he uses $7$ trucks, then at the end of the $4...
9.9k
views
answered
Jul 24, 2020
Quantitative Aptitude
gatecse-2011
quantitative-aptitude
normal
work-time
+
–
4
answers
10
GATE Overflow | Algorithms | Test 1 | Question: 19
Is an array that is sorted in decreasing order a max-heap? always yes always no sometimes only yes but not in presence of duplicates
Is an array that is sorted in decreasing order a max-heap?always yesalways nosometimes onlyyes but not in presence of duplicates
601
views
answered
May 17, 2020
Algorithms
go-alogrithms-1
algorithms
sorting
heap-sort
+
–
5
answers
11
GATE CSE 2009 | Question: 51
A hard disk has $63$ sectors per track, $10$ platters each with $2$ recording surfaces and $1000$ cylinders. The address of a sector is given as a triple $\langle c, h, s \rangle$, where $c$ is the cylinder number, $h$ is the surface number ... $\langle 400, 16, 29 \rangle$ corresponds to sector number: $505035$ $505036$ $505037$ $505038$
A hard disk has $63$ sectors per track, $10$ platters each with $2$ recording surfaces and $1000$ cylinders. The address of a sector is given as a triple $\langle c, h, s...
19.3k
views
answered
Apr 29, 2020
Operating System
gatecse-2009
operating-system
disk
normal
+
–
10
answers
12
GATE CSE 2013 | Question: 29
Consider a hard disk with $16$ recording surfaces $(0-15)$ having $16384$ cylinders $(0-16383)$ and each cylinder contains $64$ sectors $(0-63)$. Data storage capacity in each sector is $512$ bytes. Data are organized cylinder-wise and the addressing ... cylinder number of the last sector of the file, if it is stored in a contiguous manner? $1281$ $1282$ $1283$ $1284$
Consider a hard disk with $16$ recording surfaces $(0-15)$ having $16384$ cylinders $(0-16383)$ and each cylinder contains $64$ sectors $(0-63)$. Data storage capacity in...
29.8k
views
answered
Apr 29, 2020
Operating System
gatecse-2013
operating-system
disk
normal
+
–
2
answers
13
Dijkstra’s algorithms
Consider a weighted, directed acyclic graph G = (V,E,w) in which edges that leave the source vertex s may have negative weights and all other edge weights are nonnegative. Does Dijkstra’s algorithm correctly compute the shortest-path weight δ(s,t) from s to every vertex t in this graph? Justify your answer
Consider a weighted, directed acyclic graph G = (V,E,w) in which edges that leave the source vertex s may have negative weights and all other edge weights are nonnegative...
1.1k
views
answered
Jan 13, 2020
Algorithms
algorithms
dijkstras-algorithm
graph-algorithm
+
–
8
answers
14
GATE CSE 2016 Set 2 | Question: 33
Consider a $3 \ \text{GHz}$ (gigahertz) processor with a three stage pipeline and stage latencies $\large\tau_1,\tau_2$ and $\large\tau_3$ such that $\large\tau_1 =\dfrac{3 \tau_2}{4}=2\tau_3$. If the longest pipeline stage is split into two pipeline stages of equal latency , the new frequency is __________ $\text{GHz}$, ignoring delays in the pipeline registers.
Consider a $3 \ \text{GHz}$ (gigahertz) processor with a three stage pipeline and stage latencies $\large\tau_1,\tau_2$ and $\large\tau_3$ such that $\large\tau_1 =\dfrac...
19.0k
views
comment edited
Jan 11, 2020
CO and Architecture
gatecse-2016-set2
co-and-architecture
pipelining
normal
numerical-answers
+
–
5
answers
15
GATE CSE 2016 Set 1 | Question: 11
Consider the following directed graph: The number of different topological orderings of the vertices of the graph is _____________.
Consider the following directed graph:The number of different topological orderings of the vertices of the graph is _____________.
28.3k
views
answer edited
Jan 8, 2020
Algorithms
gatecse-2016-set1
algorithms
graph-algorithm
normal
numerical-answers
topological-sort
+
–
8
answers
16
GATE IT 2008 | Question: 28
Consider the following Hasse diagrams. Which all of the above represent a lattice? (i) and (iv) only (ii) and (iii) only (iii) only (i), (ii) and (iv) only
Consider the following Hasse diagrams. Which all of the above represent a lattice?(i) and (iv) only(ii) and (iii) only(iii) only(i), (ii) and (iv) only
14.9k
views
comment edited
Dec 13, 2019
Set Theory & Algebra
gateit-2008
set-theory&algebra
lattice
normal
+
–
2
answers
17
TIFR CSE 2017 | Part B | Question: 14
Consider the following grammar $G$ with terminals $\{[, ]\}$, start symbol $S$, and non-terminals $\{A, B, C\}$: $S \rightarrow AC \mid SS \mid AB$ $C \rightarrow SB$ $A \rightarrow [$ $B \rightarrow ]$ A language $L$ is called ... $L(G)$ can be recognized by a deterministic push down automaton $L(G)$ is prefix-closed $L(G)$ is recursive
Consider the following grammar $G$ with terminals $\{[, ]\}$, start symbol $S$, and non-terminals $\{A, B, C\}$:$$S \rightarrow AC \mid SS \mid AB$$$$C \rightarrow SB$$$...
2.8k
views
answer edited
Dec 6, 2019
Theory of Computation
tifr2017
theory-of-computation
identify-class-language
+
–
3
answers
18
MadeEasy Subject Test 2019: CO & Architecture - Pipelining
Consider a 5 stage pipeline with Instruction Fetch(IF),Instruction decode(ID),Execute(EX),Write back(WB),and Memory access(MA) having latencies(in ns) 3,8,5,6 and 4 respectively. What is average CPI of NON-PIPELINE CPU when speedup achieved by pipelined processor is 4?
Consider a 5 stage pipeline with Instruction Fetch(IF),Instruction decode(ID),Execute(EX),Write back(WB),and Memory access(MA) having latencies(in ns) 3,8,5,6 and 4 respe...
2.7k
views
answered
Nov 19, 2019
CO and Architecture
made-easy-test-series
co-and-architecture
pipelining
+
–
2
answers
19
Speed up factor
Pipeline system has 4 stages and each stage takes 10ns. 30% instructions are branch instructions .each branch instruction introduces delay of 3 cycle. What is speed up factor compare to same non pipelines, If there are 1000 instructions.
Pipeline system has 4 stages and each stage takes 10ns.30% instructions are branch instructions .each branch instruction introduces delay of 3 cycle. What is speed up fac...
2.9k
views
answered
Nov 19, 2019
CO and Architecture
co-and-architecture
speedup
pipelining
+
–
4
answers
20
Ace Test Series: CO & Architecture - SpeedUp In Pipeline
Consider a nonpipelined processor design which has a cycle time of 10ns and average CPI of 1.4. The maximum speedup pipelined processor can get by pipelining it into 5 stages and each stage takes 2ns is
Consider a nonpipelined processor design which has a cycle time of 10ns and average CPI of1.4. The maximum speedup pipelined processor can get by pipelining it into 5 s...
1.1k
views
answered
Nov 19, 2019
CO and Architecture
pipelining
co-and-architecture
speedup
ace-test-series
+
–
9
answers
21
GATE CSE 2016 Set 1 | Question: 28
A function $f: \Bbb{N^+} \rightarrow \Bbb{N^+}$ , defined on the set of positive integers $\Bbb{N^+}$, satisfies the following properties: $f(n)=f(n/2)$ if $n$ is even $f(n)=f(n+5)$ if $n$ is odd Let $R=\{ i \mid \exists{j} : f(j)=i \}$ be the set of distinct values that $f$ takes. The maximum possible size of $R$ is ___________.
A function $f: \Bbb{N^+} \rightarrow \Bbb{N^+}$ , defined on the set of positive integers $\Bbb{N^+}$, satisfies the following properties: $f(n)=f(n/2)...
21.4k
views
comment edited
Nov 5, 2019
Set Theory & Algebra
gatecse-2016-set1
set-theory&algebra
functions
normal
numerical-answers
+
–
9
answers
22
GATE CSE 2006 | Question: 42
A CPU has a five-stage pipeline and runs at $1$ GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new ... : $\text{1.0 second}$ $\text{1.2 seconds}$ $\text{1.4 seconds}$ $\text{1.6 seconds}$
A CPU has a five-stage pipeline and runs at $1$ GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the...
20.9k
views
answered
Oct 31, 2019
CO and Architecture
gatecse-2006
co-and-architecture
pipelining
normal
+
–
3
answers
23
TIFR CSE 2012 | Part B | Question: 11
Consider the following three version of the binary search program. Assume that the elements of type $T$ can be compared with each other; also assume that the array is sorted. i, j, k : integer; a : array [1....N] of T; x : T; Program 1 : ... $1$ and $2$ are correct. Both Program $2$ and $3$ are correct All the three programs are wrong
Consider the following three version of the binary search program. Assume that the elements of type $T$ can be compared with each other; also assume that the array is sor...
2.5k
views
comment edited
Oct 26, 2019
Algorithms
tifr2012
algorithms
binary-search
+
–
14
answers
24
GATE CSE 2012 | Question: 39
A list of $n$ strings, each of length $n$, is sorted into lexicographic order using the merge-sort algorithm. The worst case running time of this computation is $O (n \log n) $ $ O(n^{2} \log n) $ $ O(n^{2} + \log n) $ $ O(n^{2}) $
A list of $n$ strings, each of length $n$, is sorted into lexicographic order using the merge-sort algorithm. The worst case running time of this computation is$O (n \log...
28.6k
views
comment edited
Oct 17, 2019
Algorithms
gatecse-2012
algorithms
sorting
normal
+
–
7
answers
25
GATE CSE 1990 | Question: 7-b
In a two-level virtual memory, the memory access time for main memory, $t_{M}=10^{-8}$ sec, and the memory access time for the secondary memory, $t_D=10^{-3}$ sec. What must be the hit ratio, $H$ such that the access efficiency is within $80$ percent of its maximum value?
In a two-level virtual memory, the memory access time for main memory, $t_{M}=10^{-8}$ sec, and the memory access time for the secondary memory, $t_D=10^{-3}$ sec. What m...
18.9k
views
comment edited
Sep 24, 2019
Operating System
gate1990
descriptive
operating-system
virtual-memory
+
–
5
answers
26
GATE CSE 2001 | Question: 2.8
Consider the following circuit with initial state $Q_0 = Q_1 = 0$. The D Flip-flops are positive edged triggered and have set up times 20 nanosecond and hold times $0.$ Consider the following timing diagrams of X and C. The clock period of $C \geq 40$ nanosecond. Which one is the correct plot of Y?
Consider the following circuit with initial state $Q_0 = Q_1 = 0$. The D Flip-flops are positive edged triggered and have set up times 20 nanosecond and hold times $0.$Co...
21.2k
views
answered
Sep 21, 2019
Digital Logic
gatecse-2001
digital-logic
circuit-output
normal
+
–
6
answers
27
GATE CSE 2013 | Question: 39
A certain computation generates two arrays a and b such that $a[i] = f(i)$ for $0 \leq i < n$ and $b[i] = g(a[i])$ for $0 \leq i < n$. Suppose this computation is decomposed into two concurrent processes $X$ and $Y$ such that $X$ computes the array $a$ and $Y$ computes the ... EntryY(R, S) { V(S); P(R); } ExitX(R, S) { V(R); P(S); } EntryY(R, S) { V(S); P(R); }
A certain computation generates two arrays a and b such that $a[i] = f(i)$ for $0 \leq i < n$ and $b[i] = g(a[i])$ for $0 \leq i < n$. Suppose this computation is decompo...
28.1k
views
comment edited
Sep 18, 2019
Operating System
gatecse-2013
operating-system
process-synchronization
normal
+
–
4
answers
28
GATE Overflow | Programming | Test 1 | Question: 24
The output of the following C program will be (assume IEEE-754 floating point representation) #include <stdio.h> int main() { float a = 0.25; if(a == 0.25) printf("Hello"); printf(" World"); } Hello World World Compile Error Hello
The output of the following C program will be (assume IEEE-754 floating point representation)#include <stdio.h int main() { float a = 0.25; if(a == 0.25) printf("Hello");...
3.0k
views
answered
Sep 9, 2019
Programming in C
go-programming-1
programming
+
–
14
answers
29
GATE CSE 2014 Set 1 | Question: 49
A pennant is a sequence of numbers, each number being $1$ or $2$. An $n-$pennant is a sequence of numbers with sum equal to $n$. For example, $(1,1,2)$ is a $4-$pennant. The set of all possible $1-$pennants is ${(1)}$, the set of all possible ... $(1,2)$ is not the same as the pennant $(2,1)$. The number of $10-$pennants is________
A pennant is a sequence of numbers, each number being $1$ or $2$. An $n-$pennant is a sequence of numbers with sum equal to $n$. For example, $(1,1,2)$ is a $4-$pennant. ...
11.3k
views
comment edited
Sep 7, 2019
Combinatory
gatecse-2014-set1
combinatory
numerical-answers
normal
+
–
7
answers
30
GATE IT 2005 | Question: 34
Let $n =$ $p^{2}q$, where $p$ and $q$ are distinct prime numbers. How many numbers m satisfy $1 ≤ m ≤ n$ and $gcd$ $(m, n) = 1?$ Note that $gcd$ $(m, n)$ is the greatest common divisor of $m$ and $n$. $p(q - 1)$ $pq$ $\left ( p^{2}-1 \right ) (q - 1)$ $p(p - 1) (q - 1)$
Let $n =$ $p^{2}q$, where $p$ and $q$ are distinct prime numbers. How many numbers m satisfy $1 ≤ m ≤ n$ and $gcd$ $(m, n) = 1?$ Note that $gcd$ $(m, n)$ is the great...
8.0k
views
answered
Aug 22, 2019
Set Theory & Algebra
gateit-2005
set-theory&algebra
normal
number-theory
+
–
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