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Recent activity by rahuldb
3
answers
1
LR(0) Parsing Table
Please anyone create a $LR(0)$ Parsing table on this grammar and show the working of each step: $S' \rightarrow S$ $S \rightarrow S$;$A \mid A$ $A \rightarrow E \mid id := E$ $E \rightarrow E+id \mid id$ Non-Terminals: $S'$ $S$ $A$ $E$ Terminals$: ; := + id$ Please take a screenshot of copy and show in the answer the whole working.
Please anyone create a $LR(0)$ Parsing table on this grammar and show the working of each step:$S' \rightarrow S$$S \rightarrow S$;$A \mid A$$A \rightarrow E \mid id := ...
3.4k
views
answer selected
Mar 18, 2018
Compiler Design
compiler-design
lr-parser
parsing
grammar
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–
2
answers
2
Quick sort algorithm selects (n/5)th element as the smallest element
Please show the working
Please show the working
2.5k
views
asked
May 10, 2017
Algorithms
algorithms
sorting
time-complexity
test-series
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–
1
answer
3
Each row and column of a matrix is sorted find the position of any given element
please show the working
please show the working
636
views
asked
May 10, 2017
Algorithms
algorithms
algorithm-design
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–
1
answer
4
Derive the best and worst case complexity of insertion sort?
Derive the best and worst case complexity of insertion sort algorithm?
Derive the best and worst case complexity of insertion sort algorithm?
12.3k
views
answer selected
May 10, 2017
Algorithms
time-complexity
algorithms
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–
2
answers
5
Prove or disprove the following
776
views
commented
May 7, 2017
Algorithms
algorithms
time-complexity
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–
2
answers
6
State and explain master theorem
State and explain master theorem. Can Master’s method be applied to recurrence , $T(n) = 4T(n/2) + n^2logn$ ? Why or why not ?
State and explain master theorem.Can Master’s method be applied to recurrence , $T(n) = 4T(n/2) + n^2logn$ ?Why or why not ?
2.0k
views
answer selected
May 5, 2017
Algorithms
algorithms
master-theorem
time-complexity
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–
1
answer
7
Remove Left recursion from context free grammer
1.9k
views
asked
Jan 31, 2017
Compiler Design
compiler-design
grammar
left-recursion
recurrence-relation
test-series
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–
1
answer
8
Construct LL(1) Parsing table for the following grammar
4.9k
views
asked
Jan 31, 2017
Compiler Design
compiler-design
parsing
grammar
ll-parser
theory-of-computation
test-series
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–
0
answers
9
Consider the regular expression 1(1+0)*0.
Consider the regular expression 1(1+0)*0. Contruct the NFA for the given regular expression using Thomson’s construction algorithm and then apply subset construction algorithm to construct the equivalent DFA of the constructed NFA.Finally minimize the DFA. Please answer with working:)
Consider the regular expression 1(1+0)*0.Contruct the NFA for the given regular expression using Thomson’s construction algorithm and then apply subset construction alg...
390
views
asked
Dec 19, 2016
Compiler Design
compiler-design
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–
0
answers
10
The reflection along the line y=x is equivalent to reflection along the X-axis followed by counter clockwise rotation
The reflection along the line y=x is equivalent to reflection along the X-axis followed by counter clockwise rotation by theta degrees.Find the value of theta
4.2k
views
asked
Nov 30, 2016
Computer Graphics
non-gate
computer-graphics
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–
0
answers
11
Show that the composition of two rotations is additive by concatenating the matrix
Show that the composition of two rotations is additive by concatenating the matrix representations for R(theta 1) and R(theta 2) to obtain R(theta 1) x R(theta 2) = R(theta 1 + theta 2)
Show that the composition of two rotations is additive by concatenating the matrix representations for R(theta 1) and R(theta 2)to obtainR(theta 1) x R(theta 2) = R(theta...
5.3k
views
asked
Nov 30, 2016
Computer Graphics
non-gate
computer-graphics
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–
0
answers
12
Scan convert an Eclipse with given Eclipse parameters : Rx = 6 and Ry = 4
Scan convert an Eclipse with given Eclipse parameters : Rx = 6 and Ry = 4 Please show the working.
Scan convert an Eclipse with given Eclipse parameters : Rx = 6 and Ry = 4Please show the working.
405
views
asked
Nov 30, 2016
Computer Graphics
non-gate
computer-graphics
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–
0
answers
13
Scan convert a circle with radius 9.5 and centerd at origin using Mid Point Circle Algorithm
Scan convert a circle with radius 9.5 and centerd at origin using Mid Point Circle Algorithm Please show working.
Scan convert a circle with radius 9.5 and centerd at origin using Mid Point Circle AlgorithmPlease show working.
530
views
asked
Nov 30, 2016
Computer Graphics
non-gate
computer-graphics
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–
0
answers
14
A polygon has 4 vertices located a A(25, 10),B(50, 10),C(60, 30),D(20 ,30)....
A polygon has 4 vertices located a A(25, 10),B(50, 10),C(60, 30),D(20 ,30).Specify the transformation matrix required to double the size of the polygon with point A located at the same position.
A polygon has 4 vertices located a A(25, 10),B(50, 10),C(60, 30),D(20 ,30).Specify the transformation matrix required to double the size of the polygon with point A locat...
3.2k
views
asked
Nov 30, 2016
Computer Graphics
non-gate
computer-graphics
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–
1
answer
15
How long it would take to load a 512 x 480 frame buffer with 12 bits per pixel....
How long it would take to load a 512 x 480 frame buffer with 12 bits per pixel,if 1000 bits can be transferred per second?
How long it would take to load a 512 x 480 frame buffer with 12 bits per pixel,if 1000 bits can be transferred per second?
2.6k
views
answer selected
Nov 30, 2016
Computer Graphics
computer-graphics
non-gate
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–
0
answers
16
3sin(200rt) is amplitude modulated with 600
3sin(200rt) is amplitude modulated with 600s(6000rt) Find the spectral response and expression of the AM signal generated
3sin(200rt) is amplitude modulated with 600s(6000rt)Find the spectral response and expression of the AM signal generated
316
views
asked
Nov 28, 2016
Digital Signal Processing
non-gate
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1
answer
17
Execute the following instructions where R0 is of 8 bits and its content is 11001011.
Execute the following instructions where R0 is of 8 bits and its content is 11001011. i)LshiftL #2,R0 ii)AshiftR #1,R0
Execute the following instructions where R0 is of 8 bits and its content is 11001011.i)LshiftL #2,R0ii)AshiftR #1,R0
1.2k
views
answer selected
Nov 18, 2016
CO and Architecture
co-and-architecture
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–
1
answer
18
Registers R1 and R2 of a computer contains the decimal value 1100 and 500
Registers R1 and R2 of a computer contains the decimal value 1100 and 500.What is the effective address of the memory operand in each of the following instructions? i)LOAD 20(R1),R5 ii)MOVE 300,R5 iii)STORE R5,50(R1,R2) IV)SUBSTRACT(R1)+,R5
Registers R1 and R2 of a computer contains the decimal value 1100 and 500.What is the effective address of the memory operand in each of the following instructions?i)LOAD...
4.5k
views
answer selected
Nov 18, 2016
CO and Architecture
co-and-architecture
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–
1
answer
19
How many external connections are required to design 32m X 32 memory chip?
Please show the working
Please show the working
3.7k
views
answer selected
Nov 17, 2016
CO and Architecture
co-and-architecture
non-gate
+
–
1
answer
20
Find out the number of page fault in the following strings of pages used by CPU using the page replaced algorithm LRU
Find out the number of page fault in the following strings of pages used by CPU using the page replaced algorithm LRU and LIFO[taking 3 page frames]1,1,3,5,3,4,2,2,2,1,8
607
views
answer selected
Nov 17, 2016
CO and Architecture
co-and-architecture
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–
1
answer
21
Design 4m X 32 memory using 512 X 8 memory chip
Please show working
Please show working
15.7k
views
answer selected
Nov 17, 2016
CO and Architecture
co-and-architecture
non-gate
+
–
2
answers
22
A computer has 64 bit instruction and 12 bit address.....how many 1-address instruction is possible?
A computer has 64 bit instruction and 12 bit address.If there are 250 3-address instruction and 525 2-address instruction,how many 1-address instruction is possible?
7.7k
views
asked
Nov 17, 2016
CO and Architecture
co-and-architecture
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–
1
answer
23
Consider a memory of 8 words per block.If 2 clock cycle are required to transfer address from CPU to main memory
Consider a memory of 8 words per block.If 2 clock cycle are required to transfer address from CPU to main memory, 6 clock cycle to access the first word, 3 clock cycles e...
3.7k
views
commented
Nov 17, 2016
CO and Architecture
co-and-architecture
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–
1
answer
24
A two-way associative cache memory uses blocks of four words.The cache can accommodate a total of 2048 words
A two-way associative cache memory uses blocks of four words.The cache can accommodate a total of 2048 words from main memory.The main memory size is 128K X 32.Find out t...
15.9k
views
asked
Nov 17, 2016
CO and Architecture
co-and-architecture
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–
2
answers
25
A non-pipeline system 50ns to process a task....
A non-pipeline system 50ns to process a task. The same task can be processed in a 6 segment pipeline with a clock cycle of 10ns. Determine the speed of ratio of pipeline system for 100 tasks . What is the maximum speed up that can be achieved?
A non-pipeline system 50ns to process a task. The same task can be processed in a 6 segment pipeline with a clock cycle of 10ns. Determine the speed of ratio of pipeline ...
15.4k
views
answer selected
Nov 17, 2016
CO and Architecture
co-and-architecture
+
–
0
answers
26
Divide the following using restoring and non-restoring method: 13 / 4
Please show the working
Please show the working
724
views
asked
Nov 17, 2016
CO and Architecture
co-and-architecture
+
–
0
answers
27
Multiply the following using booths multiplication algorithm (-7) x (-3)
Please show working
Please show working
1.8k
views
asked
Nov 17, 2016
CO and Architecture
co-and-architecture
+
–
1
answer
28
Draw the space time diagram for a 6-segment pipeline showing the time it takes to process 8 no of tasks.
Draw the space time diagram for a 6-segment pipeline showing the time it takes to process 8 no of tasks.Determine the no of clock cycle that it takes to process 200 tasks...
18.7k
views
asked
Nov 17, 2016
CO and Architecture
co-and-architecture
+
–
0
answers
29
Write the assembly language code segment to evaluate the following arithmetic expression:
Write the assembly language code segment to evaluate the following arithmetic expression: X=((A+B)*C)/(D-E*F+G*H) Using i)Stack based organization ii)RISC organization
Write the assembly language code segment to evaluate the following arithmetic expression:X=((A+B)*C)/(D-E*F+G*H)Usingi)Stack based organizationii)RISC organization
2.1k
views
asked
Nov 17, 2016
CO and Architecture
co-and-architecture
+
–
2
answers
30
What is the hit ratio of a cache memory.If cache memory access time.....
What is the hit ratio of a cache memory.If cache memory access time is 30ns,main memory access time is 150ns and avg access time is 42ns.
What is the hit ratio of a cache memory.If cache memory access time is 30ns,main memory access time is 150ns and avg access time is 42ns.
3.4k
views
asked
Nov 17, 2016
CO and Architecture
co-and-architecture
+
–
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