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Answers by reena_kandari
1
votes
1
Mathematics GATE 2018 CH: 6
The figure which represents $y = \dfrac{sin x}{x}$ for $x>0$ ($x$ in radians) is
The figure which represents $y = \dfrac{sin x}{x}$ for $x>0$ ($x$ in radians) is
799
views
answered
Feb 20, 2018
Calculus
gate2018-ch
engineering-mathematics
calculus
functions
+
–
2
votes
2
GATE2018 EE: GA-2
“A common misconception among writers is that sentence structure mirrors thought; the more _________ the structure, the more complicated the ideas.” The word that best fills the blank in the above sentence is detailed simple clear convoluted
“A common misconception among writers is that sentence structure mirrors thought; the more _________ the structure, the more complicated the ideas.”The word that best...
2.7k
views
answered
Feb 20, 2018
Verbal Aptitude
gate2018-ee
general-aptitude
verbal-aptitude
normal
most-appropriate-word
+
–
12
votes
3
GATE2018 EE: GA-3
The three roots of the equation $f(x) = 0$ are $x = \{−2, 0, 3\}$. What are the three values of $x$ for which $f(x − 3) = 0?$ $−5, −3, 0$ $−2, 0, 3$ $0, 6, 8$ $1, 3, 6$
The three roots of the equation $f(x) = 0$ are $x = \{−2, 0, 3\}$. What are the three values of $x$ for which $f(x − 3) = 0?$$−5, −3, 0$$−2, 0, 3$$0, 6, 8$$1, 3...
2.0k
views
answered
Feb 20, 2018
Quantitative Aptitude
gate2018-ee
general-aptitude
quantitative-aptitude
easy
polynomials
+
–
1
votes
4
Test series
$\text{What is three address code representation of this ?}$ -a+b|c^d^e*f|g
$\text{What is three address code representation of this ?}$-a+b|c^d^e*f|g
572
views
answered
Feb 19, 2018
Compiler Design
compiler-design
three-address-code
numerical-answers
test-series
+
–
11
votes
5
GATE CSE 2015 Set 1 | Question: 31
Consider the following C function. int fun1 (int n) { int i, j, k, p, q = 0; for (i = 1; i < n; ++i) { p = 0; for (j = n; j > 1; j = j/2) ++p; for (k = 1; k < p; k = k * 2) ++q; } return q; } Which one of the following most closely approximates the return value of the function $\text{fun1}$? $n^3$ $n(\log n)^2$ $n \log n$ $n \log(\log n)$
Consider the following C function.int fun1 (int n) { int i, j, k, p, q = 0; for (i = 1; i < n; ++i) { p = 0; for (j = n; j 1; j = j/2) ++p; for (k = 1; k < p; k = k * 2)...
20.9k
views
answered
Dec 11, 2017
Algorithms
gatecse-2015-set1
algorithms
normal
identify-function
+
–
4
votes
6
How to draw register allocation interference graph ?
How to draw register allocation interference graph ? Can anyone explain this along with " What is a live variable "? Explain with the example given below ? a = 1 b = 10 c = 20 d = a + b e = c + d f = c + e b = c + e e = b + f d = 5 + e return d + f
How to draw register allocation interference graph ?Can anyone explain this along with " What is a live variable "?Explain with the example given below ?a = 1 b = 10 c = ...
3.1k
views
answered
Nov 9, 2017
Compiler Design
compiler-design
register-allocation
+
–
0
votes
7
UGC NET CSE | January 2017 | Part 3 | Question: 48
A software company needs to develop a project that is estimated as $1000$ function points and is planning to use JAVA as the programming language whose approximate lines of code per function point is accepted as $50$. Considering $a=1.4$ as ... how long does project take to complete? $11.2$ months $12.2$ months $13.2$ months $10.2$ months
A software company needs to develop a project that is estimated as $1000$ function points and is planning to use JAVA as the programming language whose approximate lines ...
2.9k
views
answered
Oct 28, 2017
IS&Software Engineering
ugcnetcse-jan2017-paper3
is&software-engineering
cocomo-model
+
–
7
votes
8
Dynamic loading
Does Dynamic loading require special support from the operating system.
Does Dynamic loading require special support from the operating system.
3.7k
views
answered
Oct 28, 2017
Operating System
operating-system
+
–
0
votes
9
A hard disk with transfer rate of 20 kbps is constantly transferring data to memory using DMA cycle stealing mode
A hard disk with transfer rate of 20 kbps is constantly transferring data to memory using DMA cycle stealing mode. The size of data transfer is 32 bytes. The processor ru...
2.9k
views
answered
Oct 18, 2017
CO and Architecture
co-and-architecture
dma
+
–
4
votes
10
Quick Sort
"Quick sort has good cache performance" , Can anyone explain this statement.How is cache related to quick sort.I searched for this over the internet but could not find a good article.
"Quick sort has good cache performance" , Can anyone explain this statement.How is cache related to quick sort.I searched for this over the internet but could not find a ...
1.7k
views
answered
Sep 4, 2017
Algorithms
algorithms
sorting
time-complexity
quick-sort
+
–
3
votes
11
can user level threads be scheduled on different processors in a multi-processor system.??
2.4k
views
answered
Aug 1, 2017
Operating System
operating-system
threads
+
–
0
votes
12
CFL decidability
Problem :- intersection of 2 CFL's is CFL. Is this decidable ?
Problem :- intersection of 2 CFL's is CFL. Is this decidable ?
1.7k
views
answered
Jul 30, 2017
Theory of Computation
theory-of-computation
decidability
turing-machine
context-free-language
+
–
0
votes
13
[DBMS Schedules] Lost update vs ww conflict
W1(A),R2(A),W2(A),W2(B),W1(B) This schedule has WW conflict but not Lost update problem,Please explain why? Is it possible to have WW conflict without lost update?
W1(A),R2(A),W2(A),W2(B),W1(B)This schedule has WW conflict but not Lost update problem,Please explain why?Is it possible to have WW conflict without lost update?
2.3k
views
answered
Jul 22, 2017
Databases
databases
transaction-and-concurrency
conflict-serializable
+
–
1
votes
14
Conflict Serializable and Timestamp based protocol
I know that every schedule produced by the Timestamp-based protocol is conflict serializable. But is vice versa is true? Means is all conflict serializable schedules produced by timestamp based protocol ?
I know that every schedule produced by the Timestamp-based protocol is conflict serializable. But is vice versa is true? Means is all conflict serializable schedules prod...
2.3k
views
answered
Jul 22, 2017
Databases
conflict-serializable
databases
transaction-and-concurrency
+
–
2
votes
15
databases
Which of the following statements is TRUE ? A) Every primary index is also a clustered index. B) Every clustered index is also a primary index. C) Both primary index and clustered index are one and the same, D) An index can be either primary or clustered but not both.
Which of the following statements is TRUE ?A) Every primary index is also a clustered index.B) Every clustered index is also a primary index.C) Both primary index and clu...
1.9k
views
answered
Jul 11, 2017
Databases
databases
indexing
+
–
1
votes
16
Databases
A Clustered index A) is a dense index always. B) is a sparse index always. C) can be either dense index or a sparse index,but not both. D) can be both dense index and sparse index.
A Clustered indexA) is a dense index always.B) is a sparse index always.C) can be either dense index or a sparse index,but not both.D) can be both dense index and sparse ...
6.3k
views
answered
Jul 11, 2017
Databases
databases
indexing
+
–
3
votes
17
what is true about binary semaphore?
what is true about binary semaphore? 1)Binary semaphore has drawback called busy wait or spin lock. 2)Binary semaphore is applicable only for two processes 3)Binary semaphore has no drawback called busy wait or spin lock 4)none of the above
what is true about binary semaphore?1)Binary semaphore has drawback called busy wait or spin lock.2)Binary semaphore is applicable only for two processes3)Binary semaphor...
3.4k
views
answered
Jun 22, 2017
Operating System
semaphore
+
–
2
votes
18
[TOC] Reduction theorem
If P1<=P2 means P1 is reducible to p2,then which is true? 1, If P1 is RE But Not REC,P2 is also RE but not REC? 2. If P2 is RE But Not REC,P1 is also RE but not REC? As per my understanding ,if P1 is ... is true. Please help Edit:- As a part of this solution please tell me,whether undecidable includes semidecidable also?And whether semidecidable includes decidable also?
If P1<=P2 means P1 is reducible to p2,then which is true?1, If P1 is RE But Not REC,P2 is also RE but not REC?2. If P2 is RE But Not REC,P1 is also RE but not REC?As per ...
1.6k
views
answered
Jun 20, 2017
Theory of Computation
theory-of-computation
decidability
+
–
8
votes
19
ISRO2007-53
In the Big-Endian system, the computer stores MSB of data in the lowest memory address of data unit LSB of data in the lowest memory address of data unit MSB of data in the highest memory address of data unit LSB of data in the highest memory address of data unit
In the Big-Endian system, the computer storesMSB of data in the lowest memory address of data unitLSB of data in the lowest memory address of data unitMSB of data in the ...
4.8k
views
answered
Apr 8, 2017
CO and Architecture
isro2007
co-and-architecture
floating-point-representation
little-endian-big-endian
+
–
8
votes
20
GATE CSE 2004 | Question: 18, ISRO2007-31
In an $SR$ latch made by cross-coupling two NAND gates, if both $S$ and $R$ inputs are set to $0$, then it will result in $Q = 0, Q' = 1$ $Q = 1, Q' = 0$ $Q = 1, Q' = 1$ Indeterminate states
In an $SR$ latch made by cross-coupling two NAND gates, if both $S$ and $R$ inputs are set to $0$, then it will result in$Q = 0, Q' = 1$$Q = 1, Q' = 0$$Q = 1, Q' = 1$Inde...
22.3k
views
answered
Apr 8, 2017
Digital Logic
gatecse-2004
digital-logic
easy
isro2007
flip-flop
+
–
1
votes
21
GATE CSE 2003 | Question: 14
The regular expression $0^*(10^*)^*$ denotes the same set as $(1^*0)^*1^*$ $0+(0+10)^*$ $(0+1)^*10(0+1)^*$ None of the above
The regular expression $0^*(10^*)^*$ denotes the same set as$(1^*0)^*1^*$$0+(0+10)^*$$(0+1)^*10(0+1)^*$None of the above
19.3k
views
answered
Mar 1, 2017
Theory of Computation
gatecse-2003
theory-of-computation
regular-expression
easy
+
–
0
votes
22
lead of a terminal
What is lead...?? and how to calculate it..??
What is lead...?? and how to calculate it..??
229
views
answered
Jan 5, 2017
Compiler Design
compiler-design
parsing
operator-grammar
test-series
+
–
0
votes
23
Decidability
664
views
answered
Dec 30, 2016
Theory of Computation
turing-machine
decidability
recursive-and-recursively-enumerable-languages
+
–
0
votes
24
MadeEasy Test Series: Theory Of Computation - Decidability
L= {(M)| M is a TM and there exists an input w, |w| < 100, on which M halts}. Is L decidable? Please explain.
L= {(M)| M is a TM and there exists an input w, |w| < 100, on which M halts}. Is L decidable?Please explain.
441
views
answered
Dec 30, 2016
Theory of Computation
made-easy-test-series
theory-of-computation
decidability
+
–
0
votes
25
Test by Bikram | Computer Networks | Test 1 | Question: 16
In a token bucket network transmission spreed is $20^*(10^6)$ bps and maximum rate can only be sent for at most $10$ sec at a time, and at most $150$ Mb can be sent over any $15$ sec window, then the value for token input rate is _________ mbps
In a token bucket network transmission spreed is $20^*(10^6)$ bps and maximum rate can only be sent for at most $10$ sec at a time, and at most $150$ Mb can be sent over...
1.2k
views
answered
Nov 29, 2016
Computer Networks
tbb-cn-1
numerical-answers
+
–
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