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Recent activity by saif

2 answers

1

Array
Tell me the difference : &(arr+1) and &arr+1

answer edited in Programming Feb 18, 2019

1.0k views

0 answers

2

Last question please
Why they are not multiplying H1 with T1 And H2 with T2?? please clarify this ASAp

asked in Operating System Feb 2, 2019

253 views

3 answers

3

ME MOCK 4
Consider the following function: void madeeasy (int n) { if (n < 0) return; else { printf(n); madeeasy (- -n); madeeasy (n - -); printf(n); } } The sum of all values printed by madeeasy (5)_______ (I am getting -12 but given answer is 52)

commented in Programming Jan 31, 2019

1.1k views

1 answer

4

Test series
Consider a system with main memory access time is 150ns and page fault service time is 5 microsecond if one-page fault generated for every 10^3 memory access then what is effective memory access time(in ns)?? The answer given is 154.85 and the answer I am getting is 4850.15 please verify someone

comment edited in Operating System Jan 31, 2019

186 views

1 answer

5

Self doubt
The major difference betwen Full binary tree, Complete binary tree, and strict binary tree

commented in Programming Jan 31, 2019

280 views

1 answer

6

test series
The answer given is 1.5 (they are using L'Hospital Rule) But mine is 1 [ (e^x-1)/x=1 And Log(1+x)/x = 1] Both looks but the answer is different please verify which one is correct. ASAP

commented in Mathematical Logic Jan 29, 2019

246 views

1 answer

7

Self doubt
What is the difference between Mutually exclusive event and independent event.?? Please explain, someone ASAP

asked in Mathematical Logic Jan 28, 2019

146 views

1 answer

8

test series
My answer is 1.5 and the made easy says it is 105. someone, please verify which is correct ASAP

closed in Computer Networks Jan 25, 2019

163 views

1 answer

9

ME Mocktest
Total number of ordering possible if the graph below is filled with the sequence 12,10,8,5,3,2,1,7,9 such that it satisfies the max heap property?

answer edited in Programming Jan 22, 2019

123 views

0 answers

10

Self dobut
How p+i = &(i[p]) Please explain someone.

commented in Programming Jan 22, 2019

173 views

0 answers

11

test series
(A) i>o, k>0, a[K]>a[max] (B) i>0, k<0, a[K]<a[max] (C) i<o, k>0, a[K]>a[max] (D) i<o, k<0, a[K]<a[max] The answer given is A But mine is D. please verify someone.

asked in Programming Jan 22, 2019

76 views

0 answers

12

test series
My answer is 100 and the given answer is 101. someone, please verify

asked in Digital Logic Jan 22, 2019

120 views

1 answer

13

Self doubt
What data this query will return please explain someone.. and how we approach this type of query

commented in Databases Jan 17, 2019

319 views

0 answers

14

Self Doubt
Does DMA use interrupts? or not. please, someone ..

asked in CO and Architecture Jan 13, 2019

135 views

0 answers

15

Book Suggestion
Can someone mention a link or book where i can find the ER to Relational mapping..

asked in Databases Jan 3, 2019

91 views

0 answers

16

Number system
Need help … the answer given is V-1, C-1, Z-0 But, how can we represent 204 in 2’s complement using 8 bits only???

commented in Digital Logic Jan 3, 2019

226 views

0 answers

17

Unix File Organization
Can someone suggest a book or link where I can find the Unix file Organization (to clear my concept.)

asked in Operating System Dec 31, 2018

97 views

0 answers

18

Self Doubt
L= {a^nb^2nc^n| n>=0} Isn't, it CFL ????

commented in Theory of Computation Dec 25, 2018

139 views

1 answer

19

Self doubt
Unrestricted grammar generate Recursive enumerable language. Am i right??

commented in Theory of Computation Dec 17, 2018

153 views

2 answers

20

pushdown automata
What is the difference between DPDA which accept Language by the empty stack and the one which accepts by final state

asked in Theory of Computation Dec 16, 2018

287 views

0 answers

21

Self doubt
T(n)= T(4n/5)+O(n)... we can't apply master's theorem to solve it??? And if not then how are we going solve this..

asked in Programming Dec 1, 2018

156 views

0 answers

22

Self doubt
What happens to the code which is present after a return..?? Compilation error, or it is ignored or something else

asked in Programming Nov 28, 2018

133 views

0 answers

23

Pipelining
According to me. the Solution should be Correct me!! where I am wrong.. please

commented in CO and Architecture Nov 24, 2018

210 views

0 answers

24

Made Easy Test Series
A ripple counter is made with three positive edge triggered flip-flops. If the output of previous lower significant bit flipflop is used as a triggering clock pulse of the next higher significant bit flip-flop, then the resultant counter is a A MOD 3 up counter B MOD ... D MOD 8 down counter The answer given is D but the answer C looks correct to me. Correct me if i am wrong.

commented in Digital Logic Nov 23, 2018

314 views

10 answers

25

GATE CSE 2013 | Question: 29
Consider a hard disk with $16$ recording surfaces $(0-15)$ having $16384$ cylinders $(0-16383)$ and each cylinder contains $64$ sectors $(0-63)$. Data storage capacity in each sector is $512$ bytes. Data are organized cylinder-wise and the addressing ... cylinder number of the last sector of the file, if it is stored in a contiguous manner? $1281$ $1282$ $1283$ $1284$

commented in Operating System Nov 19, 2018

23.0k views

1 answer

26

File system
Can someone explain or suggeste blog or something where i can understand the concept of indirect block address , doubly indirect block address and direct block address..

commented in Operating System Nov 19, 2018

200 views

6 answers

27

GATE CSE 2017 Set 2 | Question: 29
In a two-level cache system, the access times of $L_1$ and $L_2$ caches are $1$ and $8$ clock cycles, respectively. The miss penalty from the $L_2$ cache to main memory is $18$ clock cycles. The miss rate of $L_1$ cache is twice that of $L_2$. The average ... respectively are $0.111$ and $0.056$ $0.056$ and $0.111$ $0.0892$ and $0.1784$ $0.1784$ and $0.0892$

commented in CO and Architecture Nov 18, 2018

23.2k views

0 answers

28

Self doubt
Is there any general fromula for memory access time which include all the cases like cache hit, page fault, TLB hit etc.?? @arjun sir or anyone

asked in Operating System Nov 17, 2018

146 views

0 answers

29

Self doubts
Does context switch time depends on scheduling algorithms??

commented in Operating System Nov 17, 2018

135 views

0 answers

30

Self doubt
When a cache miss occurs the time required to access the memory is the sum of???

commented in Operating System Nov 14, 2018

116 views