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Questions by sh!va
1
votes
0
answers
1
IES 2018- Virtual memory
Statement I : Virtual memory is designated virtual because there is no such memory inside the computer. Statement II : Virtual memory uses some space of the hard disk as an extension of the primary storage of the computer. (a) Both statements I and statement ... statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : Virtual memory is designated virtual because there is no such memory inside the computer.Statement II : Virtual memory uses some space of the hard disk as a...
301
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asked
Jan 9, 2018
Operating System
ies-2018
ies
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votes
0
answers
2
IES 2018 - DOS Windows Unix comparison
Statement I : MS DOS and Windows products have always used implicit mounting when an attempt is first made to access the media. Statement II : Unix has traditionally used explicit mount command to access the removable medium. (a) Both statemnts I and ... I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : MS DOS and Windows products have always used implicit mounting when an attempt is first made to access the media.Statement II : Unix has traditionally used...
313
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asked
Jan 9, 2018
Operating System
ies-2018
ies
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votes
0
answers
3
IES 2018- Swapping
Statement I : Swapping is sometimes called roll-out/roll-in'. Statement II Swapping is utilized in systems designed to support time-sharing. (a) Both statemnts I and statement II are individually true and statement II is the correct explanation of statement I (b) ... statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : Swapping is sometimes called ‘roll-out/roll-in’.Statement II Swapping is utilized in systems designed to support time-sharing.(a) Both statemnts I and ...
262
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asked
Jan 9, 2018
Operating System
ies
ies-2018
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1
votes
0
answers
4
IES 2018- Interrupts
Statement I : The internal interrupt is initiated by some exceptional condition caused by the program itself rather than by an external event. Statement II :External interrupt depends on external conditons that are independent of the program being executed at the time. (a) ... I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : The internal interrupt is initiated by some exceptional condition caused by the program itself rather than by an external event.Statement II :External inter...
385
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asked
Jan 9, 2018
CO and Architecture
ies
ies-2018
co-and-architecture
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1
votes
1
answer
5
IES 2018 -Static memory
Statement I : Static RAM memory devices retain data for as long as power is supplied. Statement II : SRAM is used when the size of read/write memory required is large. (a) Both statemnts I and statement II are individually true and statement II is the ... of statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : Static RAM memory devices retain data for as long as power is supplied.Statement II : SRAM is used when the size of read/write memory required is large.(a) ...
287
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asked
Jan 9, 2018
CO and Architecture
ies
ies-2018
co-and-architecture
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1
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0
answers
6
IES 2018- Stack memory
Statement I : Stack is organized as 8-bit storage in the microprocessor. Statement II : Stack is a set of memory locations in R/W memory reserved for storing information temporarily during the execution of a program. (a) Both statemnts I and statement II are ... statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : Stack is organized as 8-bit storage in the microprocessor.Statement II : Stack is a set of memory locations in R/W memory reserved for storing information t...
344
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asked
Jan 9, 2018
CO and Architecture
ies
ies-2018
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1
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7
IES 2018 - IO Devices
Statement I : I/O devices can be accessed using IN and OUT instructions. Statement II : Arithmetic and logic operations can be directly performed with I/O data. (a) Both statemnts I and statement II are individually true and statement II is the correct ... statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : I/O devices can be accessed using IN and OUT instructions.Statement II : Arithmetic and logic operations can be directly performed with I/O data.(a) Both st...
158
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asked
Jan 9, 2018
CO and Architecture
ies
ies-2018
co-and-architecture
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1
votes
0
answers
8
IES 2018- Stack Pointer
Statement I Stack works on the principle of LIFO Statement II :Stack pointer contains address of the top of the stack (a) Both statemnts I and statement II are individually true and statement II is the correct explanation of statement I (b) Both statement I ... statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I Stack works on the principle of LIFOStatement II :Stack pointer contains address of the top of the stack(a) Both statemnts I and statement II are individual...
210
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asked
Jan 9, 2018
Digital Logic
ies
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9
IES 2018 - Memory PLA PROM
Statement I : PLA contains a fixed AND array and a programmable OR array. Statement II : PROM contains a fixed AND array and a programmable OR array. (a) Both statemnts I and statement II are individually true and statement II is the correct explanation of ... statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : PLA contains a fixed AND array and a programmable OR array.Statement II : PROM contains a fixed AND array and a programmable OR array.(a) Both statemnts I a...
251
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asked
Jan 9, 2018
Digital Logic
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ies-2018
digital-logic
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1
votes
1
answer
10
IES 2018 - Round robin, FCFS, SJF comparison
Consider the following set of processes First Come First Serve (FCFS), non preemptive Shortest Job First (SJF) and Round Robin (RR) (quantum = 10 ms). Scheduling Algorithms for this process set would imply which of the following features? 1. The SJF policy results in less than ... below. (a) 1, 2 and 3 (b) 1 and 2 only (c) 1 and 3 only (d) 2 and 3 only
Consider the following set of processesFirst Come First Serve (FCFS), non preemptive Shortest Job First (SJF) and Round Robin (RR) (quantum = 10 ms). Scheduling Algorithm...
694
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asked
Jan 9, 2018
Operating System
ies
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2
votes
1
answer
11
IEs 2018- Computer Networks
Which of the following statements is correct in respect of TCP and UDP protocols? (a) TCP is connection-oriented, whereas UDP is connectionless (b) TCP is connectionless, whereas UDP is connection-oriented (c) Both are connectionless (d) Both are connection-oriented
Which of the following statements is correct in respect of TCP and UDP protocols?(a) TCP is connection-oriented, whereas UDP is connectionless(b) TCP is connectionless, w...
2.4k
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asked
Jan 9, 2018
Computer Networks
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1
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12
IES 2018- Computer networks
What type of network is the Internet? (a) Circuit-switched network (b) Message-switched network (c) Packet-switched network (d) Cell-switched network
What type of network is the Internet?(a) Circuit-switched network(b) Message-switched network(c) Packet-switched network(d) Cell-switched network
342
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asked
Jan 9, 2018
Computer Networks
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1
answer
13
IES 2018- Computer Networks
The technique for using one set of addresses inside a network and remapping those addresses to a different set of addresses that are seen outside the local network on the internet is called (a) network address translation (b) address resolution (c) network address mapping (d) virtual LAN
The technique for using one set of addresses inside a network and remapping those addresses to a different set of addresses that are seen outside the local network on the...
541
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asked
Jan 9, 2018
Computer Networks
ies-2018
ies
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14
IES 2018- 8085 programming
In the following 8085 assembly language program, assume that the carry flag is initially reset. What is the content of the accumulator after the execution of the program? MVI A, 04H RRC MOV B, A RLC RLC ADD B RCC (a) 02H (b) 05H (c) 15H (d) 25H
In the following 8085 assembly language program, assume that the carry flag is initially reset. What is the content of the accumulator after the execution of the program?...
271
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asked
Jan 9, 2018
CO and Architecture
ies
ies-2018
digital-logic
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1
votes
1
answer
15
IES 2018 - Round robin scheduling
Three processors with their respective process IDs given by P1, P2 and P3, having estimated completion time of 8 ms, 4 ms and 2 ms, respectively, enter a ready queue together in the order P1, P2 and P3. What is the average turn time in the Round Robin Scheduling Algorithm with time 2 ms? (a) 10 ms (b) 15 ms (c) 20 ms (d) 25 ms
Three processors with their respective process IDs given by P1, P2 and P3, having estimated completion time of 8 ms, 4 ms and 2 ms, respectively, enter a ready queue toge...
998
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asked
Jan 9, 2018
Operating System
round-robin-scheduling
ies
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answers
16
IES 2018 - Product of sum form
Product of sum form expression leads to what kind of logic circuit? (a) OR-AND circuit (b) NOR-NOR circuit (c) AND-OR-INVERT circuit (d) NAND-NAND circuit
Product of sum form expression leads to what kind of logic circuit?(a) OR-AND circuit(b) NOR-NOR circuit(c) AND-OR-INVERT circuit(d) NAND-NAND circuit
240
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asked
Jan 9, 2018
Digital Logic
ies-2018
ies
digital-logic
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1
votes
1
answer
17
IES 2018 Program Structure
A program structure that permits repeated operation of a particular sequence of instructions is known as (a) subroutine (b) loop (c) module (d) microprogramming
A program structure that permits repeated operation of a particular sequence of instructions is known as(a) subroutine(b) loop(c) module(d) microprogramming
422
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asked
Jan 9, 2018
Programming in C
ies
ies-2018
programming
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1
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1
answer
18
IES 2018 Memory hit miss ratio
Consider that a level of the memory hierarchy has a hit rate of 80%. Memory requests take 10 ns to complete if they hit in the level, and memory requests that miss in the level take 100 ns to complete. The average access time of the level is (a) 110 ns (b) 100 ns (c) 80 ns (d) 28 ns
Consider that a level of the memory hierarchy has a hit rate of 80%. Memory requests take 10 ns to complete if they hit in the level, and memory requests that miss in the...
364
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asked
Jan 9, 2018
CO and Architecture
co-and-architecture
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answer
19
IES 2018 JK Flip flop
In a master slave JK flip-flop (a) both master and slave are positive edge triggered (b) both master and slave are negative edge triggered (c) master is positive edge triggered and slave is negative edge triggered (d) master is negative edge triggered and slave is positive edge triggered
In a master slave JK flip-flop(a) both master and slave are positive edge triggered(b) both master and slave are negative edge triggered(c) master is positive edge trigge...
414
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asked
Jan 9, 2018
Digital Logic
digital-logic
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2
votes
2
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20
IES 2018_Digital Logic_Counter
For what minimum value of propagation delay in each filp-flop will a 10 bit ripple counter skip a count, when it is clocked at 10 MHz? a) 5 ns b) 10 ns c) 20 ns d) 40 ns
For what minimum value of propagation delay in each filp-flop will a 10 bit ripple counter skip a count, when it is clocked at 10 MHz?a) 5 nsb) 10 nsc) 20 nsd) 40 ns
2.6k
views
asked
Jan 9, 2018
Digital Logic
digital-logic
ies
ies-2018
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