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Questions by sh!va
1
votes
0
answers
21
IES 2018_Digital Logic_ripple counter
In a 4-stage ripple counter, the propagation delay of a flip flop is 30 ns. If the pulse width of the strobe is 30 ns, the maximum frequency at which the counter operates reliably is nearly_________ (a) 9.7 MHz (b) 8.4 MHz (c) 6.7 MHz (d) 4.4 MHz
In a 4-stage ripple counter, the propagation delay of a flip flop is 30 ns. If the pulse width of the strobe is 30 ns, the maximum frequency at which the counter operates...
348
views
asked
Jan 9, 2018
Digital Logic
digital-logic
ies
ies-2018
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1
votes
0
answers
22
IES 2018_Digital logic (Mealy Model)
Consider the following opinions regarding the advantage and disadvantage of a Mealy model: 1. Advantage: Less number of states (hence less hardware) Disadvantage: Input transients are directly conveyed to output 2. Advantage: Output remains stable over entire clock period Disadvantage: ... the above is/are correct? (a) 1 only (b) 2 only (c) Both 1 and 2 (d) None
Consider the following opinions regarding the advantage and disadvantage of a Mealymodel:1. Advantage: Less number of states (hence less hardware)Disadvantage: Input tran...
238
views
asked
Jan 9, 2018
Digital Logic
digital-logic
ies
ies-2018
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–
1
votes
0
answers
23
IES 2018_Digital Logic
An ADC has a total conversion time of 200 μs. What is the highest frequency that its analog input should be allowed to contain? a ) 2.5 KHz b ) 25 KHz c) 250 KHz d) 0.25 KHz
An ADC has a total conversion time of 200 μs. What is the highest frequency that its analog input should be allowed to contain?a ) 2.5 KHzb ) 25 KHzc) 250 KHzd) 0.25 KHz...
367
views
asked
Jan 9, 2018
Digital Logic
digital-logic
ies
ies-2018
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–
1
votes
0
answers
24
IES 2018_Digital Logic
In large radar installations, it is required to translate the angular position of a shaft into digital information. this is most generally achieved by employing a code wheel. For unambiguous sensing of the shaft position, one employs a/an a) Octal Code b) BCD code c) Binary Gray code d) Natural binary code
In large radar installations, it is required to translate the angular position of a shaft into digital information. this is most generally achieved by employing a code wh...
393
views
asked
Jan 9, 2018
Digital Logic
ies-2018
ies
digital-logic
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2
votes
0
answers
25
GATE 2012-ECE Digital Electronics
In this circuit, the race around (A) does not occur (B) occur when CLK = 0 (C) occur when CLK =1 A= 1 and B =1 (D) occur when CLK =1 A= 0 and B =0
In this circuit, the race around(A) does not occur(B) occur when CLK = 0(C) occur when CLK =1 A= 1 and B =1(D) occur when CLK =1 A= 0 and B =0
562
views
asked
Dec 27, 2017
Digital Logic
digital-logic
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0
votes
2
answers
26
ISRO 2017-ECE Number system
The Gray code for ($A5$) $16$ is equivalent to $10010101$ $11010101$ $11011111$ $11011011$
The Gray code for ($A5$) $16$ is equivalent to$10010101$$11010101$$11011111$$11011011$
1.7k
views
asked
Nov 9, 2017
Digital Logic
isro2017-ece
digital-logic
number-system
gray-code
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1
votes
0
answers
27
ISRO 2017-ECE Digital logic
Consider following 8085 microprocessor program MVI A, DATA1 ORA A JM DISPLAY OUT PORT1 CMA DISPLAY : ADI 01H OT PORT1 HLT If DATA1 = A7H, the output at PORT1 is (a) A7H (b) 58H (c) 00H (d) 59H
Consider following 8085 microprocessor programMVIA, DATA1ORA AJM DISPLAYOUT PORT1CMADISPLAY :ADI 01HOT PORT1HLTIf DATA1 = A7H, the output at PORT1 is(a) A7H(b) 58H(c) 00H...
917
views
asked
Nov 9, 2017
Digital Logic
isro2017-ece
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0
votes
1
answer
28
ISRO 2017-ECE Digital Logic
Which of the following statement is true for Programmable Logic array (PLA)? (a) Fixed AND array and Fused programmable OR array (b) Fused programmable AND array and Fixed OR array (c) Fused programmable AND array and Fused programmable OR array (d) None of the above
Which of the following statement is true for Programmable Logic array (PLA)?(a) Fixed AND array and Fused programmable OR array(b) Fused programmable AND array and Fixed ...
1.7k
views
asked
Nov 8, 2017
Digital Logic
isro2017-ece
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0
votes
1
answer
29
ISRO 2017-ECE Minterms
Simplify the below function represented in sum of minterms
Simplify the below function represented in sum of minterms
552
views
asked
Nov 8, 2017
Digital Logic
isro2017-ece
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0
votes
1
answer
30
ISRO 2017-ECE T- Flip flops
If input to T flip flop is 200 Hz signal, then what will be the output signal frequency if four T flip flops are connected in cascade (a) 200 Hz (b) 50 Hz (c) 800 Hz (d) None of the above
If input to T flip flop is 200 Hz signal, then what will be the output signal frequency if four T flip flops are connected in cascade(a) 200 Hz(b) 50 Hz(c) 800 Hz(d) None...
2.1k
views
asked
Nov 8, 2017
Digital Logic
isro2017-ece
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0
votes
1
answer
31
ISRO 2017-ECE Computational circuits
The circuit shown in the figure converts (a) BCD to binary code (b) Binary to Excess-3 code (c) Excess-3 to Gray code (d) Gray to Binary code
The circuit shown in the figure converts(a) BCD to binary code(b) Binary to Excess-3 code(c) Excess-3 to Gray code(d) Gray to Binary code
3.1k
views
asked
Nov 8, 2017
Digital Logic
isro2017-ece
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0
votes
0
answers
32
Minimum and maximum values of float and double data types
In C++, size of float and double data types are 4 bytes and 8 bytes respectively. Calculate range ( minimum and maximum values) of float and double:
In C++, size of float and double data types are 4 bytes and 8 bytes respectively. Calculate range ( minimum and maximum values) of float and double:
346
views
asked
Sep 30, 2017
CO and Architecture
ieee-representation
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0
votes
1
answer
33
Bit rate vs Baud rate
Pick the correct statement A. Bit rate can never be less than Baud rate B. Baud rate can never be less than Bit rate C. Bit rate and Baud rate are always samr. D. None of the above
Pick the correct statement A. Bit rate can never be less than Baud rateB. Baud rate can never be less than Bit rateC. Bit rate and Baud rate are always samr.D. None of th...
1.3k
views
asked
Sep 18, 2017
0
votes
1
answer
34
CISC [Interview Question]
CISC is related to: 1. Hardware 2. Software 3. Firmware 4. None of the above
CISC is related to:1. Hardware2. Software3. Firmware4. None of the above
407
views
asked
Sep 15, 2017
CO and Architecture
co-and-architecture
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14
votes
3
answers
35
ISRO2017-80
The time complexity of computing the transitive closure of a binary relation on a set of $n$ elements is known to be a. $O(n\log n)$ b. $O\left( n^{3/2}\right)$ c. $O( n^3 )$ d. $O(n)$
The time complexity of computing the transitive closure of a binary relation on a set of $n$ elements is known to bea. $O(n\log n)$b. $O\left( n^{3/2}\right)$c. $O( n^3 )...
4.3k
views
asked
May 7, 2017
Algorithms
isro2017
relations
algorithms
time-complexity
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5
votes
2
answers
36
ISRO2017-77
If $L$ and $P$ are two recursively enumerable languages then they are not closed under Kleene star $L^*$ of $L$ Intersection $L \cap P$ Union $L \cup P$ Set difference
If $L$ and $P$ are two recursively enumerable languages then they are not closed underKleene star $L^*$ of $L$Intersection $L \cap P$Union $L \cup P$Set difference
6.8k
views
asked
May 7, 2017
Theory of Computation
isro2017
set-theory
theory-of-computation
recursive-and-recursively-enumerable-languages
closure-property
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3
votes
3
answers
37
ISRO2017-74
Which of these is a super class of all errors and exceptions in the Java language? Runtime Exceptions Throwable Catchable None of the above
Which of these is a super class of all errors and exceptions in the Java language?Runtime ExceptionsThrowableCatchableNone of the above
7.1k
views
asked
May 7, 2017
Java
isro2017
java
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7
votes
2
answers
38
ISRO2017-73
Which of the following statement is true? Hard real time OS has less jitter than soft real time OS Hard real time OS has more jitter than soft real time OS Hard real time OS has equal jitter as soft real time OS None of the above
Which of the following statement is true?Hard real time OS has less jitter than soft real time OSHard real time OS has more jitter than soft real time OSHard real time OS...
6.5k
views
asked
May 7, 2017
Operating System
isro2017
operating-system
realtime-systems
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5
votes
1
answer
39
ISRO2017-72
The Linux command mknod myfifo b 4 16 will create a character device if user is root will create a named pipe FIFO if user is root will create a block device if user is root None of these
The Linux command mknod myfifo b 4 16will create a character device if user is rootwill create a named pipe FIFO if user is rootwill create a block device if user is root...
7.5k
views
asked
May 7, 2017
Operating System
isro2017
operating-system
unix
non-gate
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–
5
votes
3
answers
40
ISRO2017-70
We use malloc and calloc for: Dynamic memory allocation Static memory allocation Both dynamic memory allocation and static memory allocation None of these
We use malloc and calloc for:Dynamic memory allocationStatic memory allocationBoth dynamic memory allocation and static memory allocationNone of these
7.1k
views
asked
May 7, 2017
Programming in C
isro2017
programming-in-c
runtime-environment
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