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Recent activity by shantanumapari17
6
answers
1
ISRO2016-19
Consider a non-pipelined processor with a clock rate of $2.5$ gigahertz and average cycles per instruction of four. The same processor is upgraded to a pipelined processor with five stages; but due to the internal pipeline delay, the clock speed is reduced to $2$ gigahertz. Assume ... no stalls in the pipeline. The speedup achieved in this pipelined processor is $3.2$ $3.0$ $2.2$ $2.0$
Consider a non-pipelined processor with a clock rate of $2.5$ gigahertz and average cycles per instruction of four. The same processor is upgraded to a pipelined processo...
6.1k
views
answered
Mar 22, 2021
CO and Architecture
co-and-architecture
pipelining
isro2016
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–
8
answers
2
GATE CSE 2017 Set 1 | Question: 50
Instruction execution in a processor is divided into $5$ stages, Instruction Fetch (IF), Instruction Decode (ID), Operand fetch (OF), Execute (EX), and Write Back (WB). These stages take 5, 4, 20, 10 and 3 nanoseconds (ns) ... speedup (correct to two decimal places) achieved by EP over NP in executing $20$ independent instructions with no hazards is _________ .
Instruction execution in a processor is divided into $5$ stages, Instruction Fetch (IF), Instruction Decode (ID), Operand fetch (OF), Execute (EX), and Write Back (WB). T...
19.1k
views
answered
Mar 22, 2021
CO and Architecture
gatecse-2017-set1
co-and-architecture
pipelining
normal
numerical-answers
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–
4
answers
3
ISRO2018-71
A particular parallel program computation requires $100$ sec when executed on a single processor, if $40\%$ of this computation is inherently sequential (i.e. will not benefit from additional processors), then theoretically best possible elapsed times of this program running with $2$ and $4$ ... sec and $10$ sec $30$ sec and $15$ sec $50$ sec and $25$ sec $70$ sec and $55$ sec
A particular parallel program computation requires $100$ sec when executed on a single processor, if $40\%$ of this computation is inherently sequential (i.e. will not be...
4.9k
views
answered
Mar 22, 2021
CO and Architecture
isro2018
co-and-architecture
parallel-programming
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–
4
answers
4
ISRO2020-1
The immediate addressing mode can be used for Loading internal registers with initial values Perform arithmetic or logical operation on data contained in instructions Which of the following is true? Only $1$ Only $2$ Both $1$ and $2$ Immediate mode refers to data in cache
The immediate addressing mode can be used forLoading internal registers with initial valuesPerform arithmetic or logical operation on data contained in instructionsWhich ...
4.0k
views
answered
Mar 21, 2021
CO and Architecture
isro-2020
co-and-architecture
normal
addressing-modes
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–
2
answers
5
Made Easy Test Series:Microprogramming
A hypothetical cpu supports $300$ instructions.each instruction takes $5$ cycle to accomplish the execution. the control unit is designed using vertical programming which has $130$ control signals $,64$ flags and $12$ branch conditions .$X$ and ... register$(CDR)$ respectively.value of $X+Y$ is ______? How to work with branch condition in micro programming :(
A hypothetical cpu supports $300$ instructions.each instruction takes $5$ cycle to accomplish the execution. the control unit is designed using vertical programming which...
2.8k
views
answered
Mar 20, 2021
CO and Architecture
made-easy-test-series
microprogramming
co-and-architecture
+
–
3
answers
6
NIELIT 2017 OCT Scientific Assistant A (CS) - Section B: 25
A micro programmed control unit Is faster than a hardwired unit Facilitates easy implementation of a new instruction Is useful when small programs are to be run All of the above
A micro programmed control unitIs faster than a hardwired unitFacilitates easy implementation of a new instructionIs useful when small programs are to be runAll of the ab...
910
views
answered
Mar 20, 2021
CO and Architecture
nielit2017oct-assistanta-cs
co-and-architecture
control-unit
microprogramming
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2
answers
7
NIELIT 2016 MAR Scientist C - Section C: 61
Microprogramming is a technique for writing small programs effectively programming output/input routines programming the microprocessors programming the control steps of a computer
Microprogramming is a technique for writing small programs effectivelyprogramming output/input routinesprogramming the microprocessorsprogramming the control steps of a c...
963
views
answered
Mar 20, 2021
Digital Signal Processing
nielit2016mar-scientistc
co-and-architecture
microprogramming
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2
answers
8
NIELIT 2016 MAR Scientist C - Section C: 46
Micro program is the name of source program in micro computers the set of instructions indicating the primitive operations in a system primitive form of macros used in assembly language programming program of very small size
Micro program is the name of source program in micro computersthe set of instructions indicating the primitive operations in a systemprimitive form of macros used in asse...
1.4k
views
answered
Mar 20, 2021
CO and Architecture
nielit2016mar-scientistc
co-and-architecture
microprogramming
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