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Questions by shreshtha5

2 votes
2 answers
1
sql query
0 votes
0 answers
2
hit ratio
a byte addressable computer has a small data cache capable of holding eight 32 bit words.Each cache block consists of two 32 bit words.For the following sequence of addresses( in hex), the hit ratio if the two way set associative LRU cache is used is.... 200,204,208, 20C,2F4,2F0,2F4,2F0,21C,218,21C
a byte addressable computer has a small data cache capable of holding eight 32 bit words.Each cache block consists of two 32 bit words.For the following sequence of addre...
1 votes
1 answer
3
cache miss
0 votes
0 answers
4
cache miss
0 votes
1 answer
5
p&c
six balls have to be placed in the squares such that each row has atleast one ball . no of ways of doing this is-
six balls have to be placed in the squares such that each row has atleast one ball . no of ways of doing this is-
1 votes
1 answer
6
TCP
let the size of the congestion window of a TCP connection be 32KB.When time out occurs the maximum segment size used is 2KB.If the time taken by the TCP connection to get 32 KB congestion window size is 480 ms than the RTT is??
let the size of the congestion window of a TCP connection be 32KB.When time out occurs the maximum segment size used is 2KB.If the time taken by the TCP connection to get...
1 votes
2 answers
7
window size
the round trip delay between sender and receiver is 160ms and the bottleneck bandwidth of the link is 256 kbps.Sender uses sliding window protocol to send a 64 byte packet.The optimal size of the window that sender should use is ?
the round trip delay between sender and receiver is 160ms and the bottleneck bandwidth of the link is 256 kbps.Sender uses sliding window protocol to send a 64 byte packe...
2 votes
1 answer
8
regular
2 votes
2 answers
12
pipeline
is 2ns?(in MIPS)
is 2ns?(in MIPS)
1 votes
0 answers
13
pipeline
suppose there is unpipelined processor with a cycle time of 30ns which is evenly divided into 5 pipeline stages.The total latch latency of the pipeline will be
suppose there is unpipelined processor with a cycle time of 30ns which is evenly divided into 5 pipeline stages.The total latch latency of the pipeline will be
1 votes
0 answers
14
clock cycle
the maximum clock frequency at which the data path can operate is ??
the maximum clock frequency at which the data path can operate is ??
1 votes
2 answers
16
asymtotic notations
Q). Consider the following functions $f_1 = n^{\frac{4}{3}}$ $f_2=2^{2^n}$ $f_3= 2^{n^2}$ $f_4= n!$ $f_5=2^n$ Which of the following is true? A). $f_1$ is $\Omega(f_2)$ B). $f_2$ is $O(f_3)$ C). $f_1<f_5<f_4<f_2<f_3$ D). $f_4$ is $O(f_3)$
Q). Consider the following functions$f_1 = n^{\frac{4}{3}}$$f_2=2^{2^n}$$f_3= 2^{n^2}$$f_4= n!$$f_5=2^n$Which of the following is true?A). $f_1$ is $\Omega(f_2)$B). $f_2$...
1 votes
1 answer
17
multivalued dependency
find multivalued dependency in this table?
find multivalued dependency in this table?
1 votes
1 answer
18
BST
certain file system stores records as per binary search tree principles.If the preorder traversal is 90,40,30,190,140,100,290.What is the expected number of comparisons when we randomly request one of the records?
certain file system stores records as per binary search tree principles.If the preorder traversal is 90,40,30,190,140,100,290.What is the expected number of comparisons w...
1 votes
2 answers
19
inverion pairs
assume that A be an array of 16 elements.What is the difference between maximum and minimum number of inversion pairs in worst case?
assume that A be an array of 16 elements.What is the difference between maximum and minimum number of inversion pairs in worst case?
1 votes
1 answer
20
no. of gates
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