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0 votes
1 answer
1
how to solve
1 votes
1 answer
3
what is the Output F
1 votes
0 answers
4
which of the following are false
0 votes
0 answers
5
What is page size
0 votes
0 answers
6
Infinite set
If S is infinite set and S1 ...........Sn be sets such that S1U S2US3 ..................USn =S, then a. Atleast one of the set Si is a finite set b. Not more than one of the sets Si can be finite c. Atleast one of the sets Si is an infinite set d. Not more than one of the sets Si can be infinite
If S is infinite set and S1 ...........Sn be sets such that S1U S2US3 ..................USn =S, thena. Atleast one of the set Si is a finite setb. Not more than one of t...
1 votes
2 answers
7
Recognize the language
If L be a language recognizable by a finite automata, then language from {L}={w such that w is prefix of v where v belongs to L},is a a. Regular Language b. Context Free language c. Context Sensitive Language d. Recursive Enumerable Language
If L be a language recognizable by a finite automata, then language from {L}={w such that w is prefix of v where v belongs to L},is aa. Regular Languageb. Context Free la...
4 votes
3 answers
8
Time complexity
T(n)=2T(n-1)-1 , for n>0 1 , otherwise What is the time complexity
T(n)=2T(n-1)-1 , for n>0 1 , otherwiseWhat is the time complexity
0 votes
0 answers
9
Tag bits
The width of the physical address on a machine is 40 bits. The width of the tag field in a 512 KB 8-way set associative cache is ? 24 bits 32 bits 16 bits 8 bits
The width of the physical address on a machine is 40 bits. The width of the tag field in a 512 KB 8-way set associative cache is ?24 bits32 bits16 bits8 bits
1 votes
1 answer
11
How many stacks are formed
F(){ F1(){ F2(){ F3(){ } } } } Here for each function a new stack is used or single stack is used for all the functions As per me Single stack could be enough Can some one please clarify me
F(){F1(){F2(){F3(){ } } } }Here for each function a new stack is used or single stack is used for all the functionsAs per me Single stack could be enough Can some one ple...
1 votes
1 answer
12
How to implement 4 input nand gate using 2 input nand gate
For me one 4-input nand gate could be implemented by five 2-input nand gates is this correct or can we implement using less number of gates
For me one 4-input nand gate could be implemented by five 2-input nand gates is this correct or can we implement using less number of gates
1 votes
0 answers
13
Preparation for Bel
Hello Everyone Im preparing for BEL PE 2017 Im doing my basic preparation To get Qualified how many marks should I score and Is general Knowledge ,English are important or Can i leave them Anyone can share details about the examination Please Thank You In Advance
Hello EveryoneIm preparing for BEL PE 2017Im doing my basic preparationTo get Qualified how many marks should I scoreand Is general Knowledge ,English are important or Ca...
3 votes
2 answers
14
Time complexity
2 votes
1 answer
15
DVRP and LINK STATE
0 votes
0 answers
16
Difference bétween distance vector routing and link state routing
I'm confused with these two please can some explain
I'm confused with these two please can some explain
2 votes
2 answers
18
Undecidability means recognizable or unrecognizable
If a problem is undecidable then can we say the problem is either recognizable or unrecognizable
If a problem is undecidable then can we say the problem is either recognizable or unrecognizable
2 votes
3 answers
19
Is dead state included in Minimum DFA
Here minimum no. of states 4 or 5(including dead state)
Here minimum no. of states 4 or 5(including dead state)
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