$8\;\textsf{KB}$ pages means $13$ offset bits.
For $32$ bit physical address, $32 - 13 = 19$ page frame bits must be there in each PTE (Page Table Entry).
We also have $1$ valid bit, $1$ dirty bit and $3$ permission bits.
So, total size of a PTE (Page Table Entry) $= 19 + 5 = 24$ bits $= 3$ bytes.
Given in question, maximum page table size $= 24\;\textsf{MB}$
Page table size $=$ No. of PTEs $\times$ size of an entry
So, no. of PTEs $= 24\;\textsf{ MB} / 3\;\textsf{B} = 8\;\textsf{M}$
Virtual address supported $=$ No. of PTEs $\ast$ Page size (As we need a PTE for each page and assuming single-level paging)
$= 8\;\textsf{M} \ast 8\;\textsf{KB}$
$= 64\;\textsf{GB} = 2^{36}$ Bytes
So, length of virtual address supported $= 36$ bits (assuming byte addressing)