Login
Register
Dark Mode
Brightness
Profile
Edit Profile
Messages
My favorites
My Updates
Logout
Filter
Profile
Wall
Recent activity
All questions
All answers
Exams Taken
All Blogs
Answers by Abhishek Kumar
5
votes
1
GATE CSE 2014 Set 2 | Question: 45
The value of a $\text{float}$ type variable is represented using the single-precision $\text{32-bit}$ floating point format of $\text{IEEE-754}$ standard that uses $1$ $\text{bit}$ for sign, $\text{8 bits}$ for biased exponent and ... . The representation of $X$ in hexadecimal notation is $\text{C1640000H}$ $\text{416C0000H}$ $\text{41640000H}$ $\text{C16C0000H}$
The value of a $\text{float}$ type variable is represented using the single-precision $\text{32-bit}$ floating point format of $\text{IEEE-754}$ standard that uses $1$ $\...
11.4k
views
answered
Feb 1, 2015
Digital Logic
gatecse-2014-set2
digital-logic
number-representation
normal
ieee-representation
+
–
3
votes
2
GATE CSE 2003 | Question: 55
Consider the NFA $M$ shown below. Let the language accepted by $M$ be $L$. Let $L_1$ be the language accepted by the NFA $M_1$ obtained by changing the accepting state of $M$ to a non-accepting state and by changing the non-accepting states of $M$ to accepting states. Which ... statements is true? $L_1 = \{0,1\}^*-L$ $L_1 = \{0,1\}^*$ $L_1 \subseteq L$ $L_1 = L$
Consider the NFA $M$ shown below.Let the language accepted by $M$ be $L$. Let $L_1$ be the language accepted by the NFA $M_1$ obtained by changing the accepting state of ...
14.5k
views
answered
Jan 28, 2015
Theory of Computation
gatecse-2003
theory-of-computation
finite-automata
normal
+
–
–4
votes
3
GATE CSE 2013 | Question: 34
A shared variable $x$, initialized to zero, is operated on by four concurrent processes $W, X, Y, Z$ as follows. Each of the processes $W$ and $X$ reads $x$ from memory, increments by one, stores it to memory, and then terminates. Each of the ... initialized to two. What is the maximum possible value of $x$ after all processes complete execution? $-2$ $-1$ $1$ $2$
A shared variable $x$, initialized to zero, is operated on by four concurrent processes $W, X, Y, Z$ as follows. Each of the processes $W$ and $X$ reads $x$ from memory, ...
23.0k
views
answered
Jan 27, 2015
Operating System
gatecse-2013
operating-system
process-synchronization
normal
+
–
–1
votes
4
Which of the following languages are CFL?
Which of the following languages are CFL? $L_1= \left \{ 0^n 1^m \mid n \leq m \leq 2n \right \} \\[1em] L_2 =\left \{ a^i b^j c^k \mid i=2j \text{ or } j=2k \right \}$
Which of the following languages are CFL?$$L_1= \left \{ 0^n 1^m \mid n \leq m \leq 2n \right \} \\[1em] L_2 =\left \{ a^i b^j c^k \mid i=2j \text{ or } j=2k \right \}$$
2.0k
views
answered
Jan 16, 2015
Theory of Computation
theory-of-computation
context-free-language
normal
+
–
1
votes
5
No. of 1-address instructions
A computer system supports 1-address instructions and 2-address instructions and word size is 16 bits. Main memory is 64 words. If there are eight 2 -address instructions then how many 1-address instructions are used?
A computer system supports 1-address instructions and 2-address instructions and word size is 16 bits. Main memory is 64 words. If there are eight 2 -address instructions...
5.2k
views
answered
Dec 27, 2014
4
votes
6
GATE CSE 2014 Set 3 | Question: 9
Consider the following processors (ns stands for nanoseconds). Assume that the pipeline registers have zero latency. $\text{P1:}$ Four-stage pipeline with stage latencies $\text{1 ns, 2 ns, 2 ns, 1 ns}$. $\text{P2:}$ Four-stage pipeline with stage latencies ... $\text{P1}$ $\text{P2}$ $\text{P3}$ $\text{P4}$
Consider the following processors (ns stands for nanoseconds). Assume that the pipeline registers have zero latency. $\text{P1:}$ Four-stage pipeline with stage latencies...
8.4k
views
answered
Dec 26, 2014
CO and Architecture
gatecse-2014-set3
co-and-architecture
pipelining
normal
+
–
Email or Username
Show
Hide
Password
I forgot my password
Remember
Log in
Register