#Cache

Question

Consider a direct map cache of 8 words, with block 2 words per Block. The following sequence of access to memory block 0,5,2,7,4,0 and 4 is repeated 10 times.

Q1) number of compulsory miss?

Q2) number of conflict misses?

Q3) The number of capacity misses?

Comments

suneetha explain how you got 29 conflicts ?

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block access =i mod4

1st pass

0 mod4=0(1st time compulsory miss)

5 mod4=1(1st time compulsory miss)

2 mod4=2(1st time compulsory miss)

7 mod4=3(1st time compulsory miss)

4 mod4=0(here 4 here 1st time so it is also compulsory miss)

0 mod4=0(here 2nd time so it is conflict miss)

4 mod4=0(here 2nd time so it is conflict miss)

2nd pass

0 mod4=0(but there is 4 so it is conflict miss)

5 mod4=1(hit)

2 mod4=2(hit)

7 mod4=3(hit)

4 mod4=0(conflict miss)

0 mod4=0(conflict miss

4 mod4=0(conflict miss)

3rd pass

0 mod4=0(conflict miss)

5 mod4=1(hit)

2 mod4=2(hit)

7 mod4=3(hit)

4 mod4=0(conflict miss)

0 mod4=0(conflict miss)

4 mod4=0(conflict miss)

and so on

so total compulsory miss=5

conflict miss=2+9*4=2+36=38

sry for the wrong ans it is 38

 

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If words 4 and 5 belongs to the same block then how come there would be 5 compulsory misses? It should be 4 compulsory misses. Isn't it?

Answer 1

It's clear that there are 4 Cache Lines.

Compulsory Miss = 5

Conflict misses are misses that would not occur if the cache were fully associative with LRU replacement.

In first Iteration, last block will cause Conflict Miss because after the Previous Access to 4, we only have 1 unique block access which means in a fully associative cache with LRU replacement this would not be causing a miss.

Conflict Miss = 19

Capacity Miss is also 19

Total = 5+19+19 = 43 Miss

Please let me know the correct answer, I think i solved it correctly

Comments

Ayan21

According to the definition of capacity miss, i feel this solution is correct. there will be capacity miss. Source of this Question? if it's ME, i don't believe their solution.

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in the first pass how did you get that when we access 0 for the second time is capacity miss and when we access 4 for the second time is conflict miss?

and in the second pass when we access 0 for the first time it is conflict miss and when we access 4 for the first time it is capacity miss and when we access 0 for the second time it is capacity miss and when we access 0 for the second time its conflict miss.

this is very confusing .can you please help me with this?

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thank u very much brother.couldn't find right answer than this

Answer 2

Compulsory Miss----> 5

Conflict Miss ----------> 0

Capacity Miss --------->2( for 1st)+4*9( for rest 9 repeat)=38

Comments

How 2 is a capacity miss? And is there no conflict miss?