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Answers by Rackson
0
votes
31
MadeEasy Test Series: Operating System - Process Schedule
1.1k
views
answered
Nov 19, 2018
Operating System
made-easy-test-series
operating-system
process-scheduling
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–
1
votes
32
TIFR-2014-Maths-A-14
Let $G$ be a group and let $H$ and $K$ be two subgroups of $G$. If both $H$ and $K$ have $12$ elements, which of the following numbers cannot be the cardinality of the set $HK = \left\{hk : h \in H, k \in K\right\}$? $72$ $60$ $48$ $36$
Let $G$ be a group and let $H$ and $K$ be two subgroups of $G$. If both $H$ and $K$ have $12$ elements, which of the following numbers cannot be the cardinality of the se...
1.2k
views
answered
Nov 18, 2018
Set Theory & Algebra
tifrmaths2014
set-theory&algebra
group-theory
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–
0
votes
33
TIFR-2015-Maths-A-4
Let $S$ be the collection of (isomorphism classes of) groups $G$ which have the property that every element of $G$ commutes only with the identity element and itself. Then $|S| = 1$ $|S| = 2$ $|S| \geq 3$ and is finite $|S| = \infty$
Let $S$ be the collection of (isomorphism classes of) groups $G$ which have the property that every element of $G$ commutes only with the identity element and itself. The...
947
views
answered
Nov 18, 2018
Set Theory & Algebra
tifrmaths2015
group-theory
group-isomorphism
non-gate
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–
0
votes
34
GATE CSE 2007 | Question: 21
How many different non-isomorphic Abelian groups of order $4$ are there? $2$ $3$ $4$ $5$
How many different non-isomorphic Abelian groups of order $4$ are there?$2$$3$$4$$5$
19.9k
views
answered
Nov 18, 2018
Set Theory & Algebra
gatecse-2007
group-theory
normal
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–
0
votes
35
GATE 2014 MA Groups
291
views
answered
Nov 17, 2018
Set Theory & Algebra
group-theory
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–
1
votes
36
IPv4 (Wrap around time)
Consider an IPv4 network. Each host can generate packets at the rate of 500 packets per second. If each packet in the network is identified by unique identification number of 48 bits, then the host wrap around time for generating packets will be ________s
Consider an IPv4 network. Each host can generate packets at the rate of 500 packets per second. If each packet in the network is identified by unique identification numbe...
2.5k
views
answered
Nov 16, 2018
Computer Networks
ip-addressing
computer-networks
network-addressing
madeeasy-testseries-2018
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–
0
votes
37
A host with ip address 200.100.1.1 wants to send a packet to all hosts in the same network whats SIP and DIP
6.9k
views
answered
Nov 16, 2018
Computer Networks
network-addressing
subnetting
computer-networks
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–
0
votes
38
SQL doubt
what will be the output of the query ? SELECT A, Avg(B) FROM R GROUP BY A: Table R A B C a1 b1 80 NULL b2 90 a3 b5 40 NULL b2 30 a1 b1 90 a3 b6 NULL
what will be the output of the query ?SELECT A, Avg(B)FROM R GROUP BY A:Table RABCa1b180NULLb290a3b540NULLb230a1b190a3b6NULL
494
views
answered
Nov 14, 2018
0
votes
39
Aggregate Functions in relational algebra
is aggregate functions in relational algebra important with GATE's perspective or can I skip it?
is aggregate functions in relational algebra important with GATE's perspective or can I skip it?
1.3k
views
answered
Nov 14, 2018
GATE
relational-algebra
databases
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–
4
votes
40
#addressing
Consider a hypothetical CPU which supports 16 bit instruction, 64 registers and 1 KB memory space. If there exist 12 2-address instruction which uses register reference and 12 1-address memory reference instructions how many O-address instructions are possible?
Consider a hypothetical CPU which supports 16 bit instruction, 64 registers and 1 KB memory space. If there exist 12 2-address instruction which uses register reference a...
3.1k
views
answered
Nov 5, 2018
CO and Architecture
co-and-architecture
numerical-answers
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–
0
votes
41
Ethernet
Consider two Station communicating via 1 Mbps Satellite link with propagation delay of 270 msec. The Satellite merely serves to retransmit data received from one station to another,with negligible switch delay. If Ethernet frame size is 1024 bits with 3 bit sequence number,then max. possible data throughput is.................
Consider two Station communicating via 1 Mbps Satellite link with propagation delay of 270 msec. The Satellite merely serves to retransmit data received from one station ...
2.2k
views
answered
Nov 4, 2018
Computer Networks
ethernet
computer-networks
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–
0
votes
42
https://gateoverflow.in/3838/gate2005-it-75 self doubt
In a TDM medium access control bus LAN, each station is assigned one time slot per cycle for transmission. Assume that the length of each time slot is the time to transmit 100bits plus the end-to-end propagation delay. Assume ... division multiple access as only one station uses the medium in its slot? please if someone can clear this doubt.
In a TDM medium access control bus LAN, each station is assigned one time slot per cycle for transmission. Assume that the length of each time slot is the time to transmi...
458
views
answered
Nov 4, 2018
Computer Networks
computer-networks
ethernet
transmission-media
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–
1
votes
43
GATE CSE 2015 Set 1 | Question: 29
Consider a LAN with four nodes $S_1, S_2, S_3,$ and $S_4$. Time is divided into fixed-size slots, and a node can begin its transmission only at the beginning of a slot. A collision is said to have occurred if more than ... respectively. The probability of sending a frame in the first slot without any collision by any of these four stations is__________________.
Consider a LAN with four nodes $S_1, S_2, S_3,$ and $S_4$. Time is divided into fixed-size slots, and a node can begin its transmission only at the beginning of a slot. A...
13.9k
views
answered
Nov 3, 2018
Computer Networks
gatecse-2015-set1
computer-networks
normal
numerical-answers
congestion-control
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–
1
votes
44
exponential backoff
Nodes A and B are connected with 100 Mbps ethernet segment with 6 microsec pop.delay between them.Suppose A,B send frames at t=0 and frames get collided.after first collision A draws k=0 and bdraws k=1.if jam signal is ignored and timeout ... what time A's packet gets completely delivered to B...assume packet size 1000 bits. 28 microsec 16 microsec 22 microsec 38 microsec
Nodes A and B are connected with 100 Mbps ethernet segment with 6 microsec pop.delay between them.Suppose A,B send frames at t=0 and frames get collided.after first colli...
3.1k
views
answered
Nov 3, 2018
0
votes
45
ISRO2011-58
In DMA transfer scheme, the transfer scheme other than burst mode is cycle technique stealing technique cycle stealing technique cycle bypass technique
In DMA transfer scheme, the transfer scheme other than burst mode iscycle techniquestealing techniquecycle stealing techniquecycle bypass technique
3.6k
views
answered
Oct 30, 2018
CO and Architecture
isro2011
co-and-architecture
io-handling
dma
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–
1
votes
46
Non Vectored Interrupt
1.8k
views
answered
Oct 30, 2018
CO and Architecture
interrupts
co-and-architecture
io-handling
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–
0
votes
47
TANCET 2011 OPERATING SYSTEM
Railway reservation system currently operational in India can be classified as a 1) batch processing system 2) real time system 3) online system 4) expert system
Railway reservation system currently operational in India can be classified as a1) batch processing system2) real time system3) online system4) expert system
1.1k
views
answered
Oct 24, 2018
Operating System
tancet
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–
0
votes
48
TANCET 2011 OS
The access method used for obtaining a record from a cassette tape is 1) direct 2) sequential 3) random 4) parallel
The access method used for obtaining a record from a cassette tape is1) direct2) sequential3) random4) parallel
354
views
answered
Oct 24, 2018
Operating System
tancet
+
–
0
votes
49
made easy
Consider a computer system using 2-level paging with TLB.The logical adress supported is 32 bits.The page table is divided into 512 pages each of size 1k.The memory access time is 100ns and TLB access time is 15 ns.page table entry size at 1st level is 2 bytes and that ... the top level page table along with page of the second level page table for a process? a) 6KB B) 4KB C)5KB D)12KB
Consider a computer system using 2-level paging with TLB.The logical adress supported is 32 bits.The page table is divided into 512 pages each of size 1k.The memory acce...
575
views
answered
Oct 24, 2018
0
votes
50
MadeEasy_OS_test
Here it is given that the load and store are atomic. So , I Am assuming that Thread 1 uses following machine code to increment x by 3. $(I)LOAD\,R_i\,M[X]$ $(II)ADDI\,R_i,3$ $(III)STORE\,R_i,M[X]$ And thread 2 uses below machine code for ... value comes to be 30, please let me know. I see I can get minimum value 30 only when the increment of x and assignment both are atomic.
Here it is given that the load and store are atomic.So , I Am assuming that Thread 1 uses following machine code to increment x by 3.$(I)LOAD\,R_i\,M[X]$$(II)ADDI\,R_i,3$...
988
views
answered
Oct 23, 2018
Operating System
operating-system
process-synchronization
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–
0
votes
51
SELF DOUBT REGISTER REFERENCE
MOV R1 #23 HOW MANY REGISTER REFERENCES ARE REQUIRED?
MOV R1 #23 HOW MANY REGISTER REFERENCES ARE REQUIRED?
349
views
answered
Oct 21, 2018
CO and Architecture
co-and-architecture
addressing-modes
self-doubt
+
–
0
votes
52
test series co
r1 ← r2 − r3 M[r1 + 100] ← r2 how many RBW AND WBW DEPENDENCY???
r1 ← r2 − r3M[r1 + 100] ← r2how many RBW AND WBW DEPENDENCY???
338
views
answered
Oct 21, 2018
CO and Architecture
co-and-architecture
data-hazards
numerical-answers
test-series
+
–
0
votes
53
Gate forum workbook
We are Simulate a cache of 16 words, 2-way set associate cache with 2 word cache lines and LRU replacement policy; assume the cache in initially empty. The following sequences of address references are generated (the addresses are given in hexadecimal), where all references are instruction ... (A) Set 1 contains 6A (B) Set 0 contains 108 (C) Both (A) and (B) (D) None of these
We are Simulate a cache of 16 words, 2-way set associate cache with 2 word cache lines and LRU replacement policy; assume the cache in initially empty. The following sequ...
393
views
answered
Oct 21, 2018
CO and Architecture
co-and-architecture
cache-memory
gateforum-booklet
+
–
0
votes
54
Microprogramming
A micro program control unit is required to generate a total of 25 control signals. Assume that during any micro instruction, at most two control signals are active. The number of bits required in the control word to generate the required ... this question I am asking about horizontal microprogramming) previous year gate question link:https://gateoverflow.in/2754/gate1996-2-25
A micro program control unit is required to generate a total of 25 control signals. Assume thatduring any micro instruction, at most two control signals are active. The n...
1.1k
views
answered
Oct 20, 2018
CO and Architecture
horizontal
vertical-microprogramming
microprogramming
horizontal-microprogramming
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–
0
votes
55
Horizontal Microprogramming
To represent $256$ control signals in horizontal microprogramming, then the number of bits requires is ___________ $7$ $8$ $128$ $256$ Plz, explain in detail. how the answer would change if horizontal microprogramming is replaced with vertical microprogramming. And what is the difference between horizontal microprogramming and vertical microprogramming?
To represent $256$ control signals in horizontal microprogramming, then the number of bits requires is ___________$7$$8$$128$$256$Plz, explain in detail. how the answer w...
2.4k
views
answered
Oct 20, 2018
CO and Architecture
co-and-architecture
microprogramming
horizontal-microprogramming
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–
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