co_williams

Question

The Intel 8088 consists of a bus interface unit (BIU) and an execution unit (EU), which form a 2-stage pipeline. The BIU fetches instructions into a 4-byte instruction queue.The BIU also participates in address calculations, fetches operands, and writes results in memory as requested by the EU. If no such requests are outstanding and the bus is free, the BIU fills any vacancies in the instruction queue. When the EU completes execution of an instruction, it passes any results to the BIU (destined for memory or I/O) and proceeds to the next instruction.

1. Suppose the tasks performed by the BIU and EU take about equal time. By what factor does pipelining improve the performance of the 8088? Ignore the effect of branch instructions.
2. Repeat the calculation assuming that the EU takes twice as long as the BIU.

Answer 1

We know : 

Performance enhancement = Speedup =  Time_{non pipelined} / Time_pipelined

So ,

Solution to a) part :  

Time taken by non pipelined processor  =   Time taken by EU + Time taken by BIU    =   2t

Time taken by pipelined processor    =  CPI * max(Time by EU,Time by BIU)   =  1 * t  =  t   [ As CPI of an ideal CPU is 1 ]

Hence speedup     =     2t  /  t

                           =     2 

Solution to b) part :

 

Time taken by non pipelined processor  =   Time taken by EU + Time taken by BIU    =   2t + t = 3t

Time taken by pipelined processor    =  CPI * max(Time by EU,Time by BIU)   =  1 * 2t  =  2t   [ As CPI of an ideal CPU is 1 ]

Hence speedup     =     3t  /  2t

                           =     1.5