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Recent questions and answers in Digital Logic

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1

digital
Which of these boolean functions is/are functionally complete? A f(x, y, z) = x' + yz' B f(x, y) = x' + xy C f(x, y, z) = xy' + x' + x'z D None of these

someshawasthi asked in Digital Logic 1 day ago

by someshawasthi

17 views

6 votes

3 answers

2

ISRO2014-25
Suppose you want to build a memory with $4$ byte words and a capacity of $2^{21}$ bits. What is type of decoder required if the memory is built using $2K \times$ $8$ $\text{RAM}$ chips? $\text{5 to 32}$ $\text{6 to 64}$ $\text{4 to 16}$ $\text{7 to 128}$

aniket760 answered in Digital Logic 3 days ago

5.7k views

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1 answer

3

A certain 4 input gate called a LEMON gate realizes the function LEMON(A,B,C,D) = BC(A+D). Show a realization of the function f (w,x,y,z) = Σ(0, 1, 6, 9, 10, 11, 14, 15) with only three LEMON gates and one OR gate. (Assume complemented inputs as available).

simi2426 answered in Digital Logic 4 days ago

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0 answers

4

Float representation using normalised mantissa
while representing an exponent in floating point number why do we add a biased term? What is the benifit of adding this??

Sk Jamil Ahemad asked in Digital Logic Mar 20

by Sk Jamil Ahemad

40 views

0 votes

2 answers

5

1. Express the following function as a sum of minterms: F(A, B, C, D) = B'D+A'D + BD
1. Express the following function as a sum of minterms: F(A, B, C, D) = B'D+A'D + BD

KG answered in Digital Logic Mar 10

by KG

109 views

0 votes

4 answers

6

Essential Prime Implicants
The number of essential prime implicates of F(A,B,C,D)=∑m(0,1,5,7,10,14,15)are

Bharat Bhushan answered in Digital Logic Mar 10

by Bharat Bhushan

2.3k views

1 vote

5 answers

7

Digital Logic
No of switching fn for f (A, B, C, D)=BD+B'D' How to approach this question ?

Bharat Bhushan answered in Digital Logic Mar 10

by Bharat Bhushan

1.1k views

14 votes

3 answers

8

minimum number of NAND and NOR gates
Is there any systematic approach to find the minimum number of two input NAND gates and two input NOR gates to be used to impelement a binary expression? If there then please elaborate it for the function Y = A'B+B'C+CD' .

Priyanshu Karmakar answered in Digital Logic Mar 8

by Priyanshu Karmakar

29.4k views

0 votes

1 answer

9

self doubt
is there any output difference between active high decoder and active low decoder

Bharat Bhushan answered in Digital Logic Mar 7

by Bharat Bhushan

51 views

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2 answers

10

ripple carry adder
Half Adder is implemented with XOR and AND gate. A. FA is implemented with 2 HA and 1 OR gate The propagation delay of XOR -gate is twice that of AND / OR gate. Propagation delay of AND/OR is 1.2 ms. A 4-bit ripple carry binary adder is implemented using 4 full adder. the total propagation time of this 4 bit binary adder in micro second is ________?

Bharat Bhushan answered in Digital Logic Mar 5

by Bharat Bhushan

56 views

1 vote

1 answer

11

GATE CSE 2023 | Question: 33
Consider a sequential digital circuit consisting of $\mathrm{T}$ flip-flops and $\mathrm{D}$ flip-flops as shown in the figure. $\text{CLKIN}$ is the clock input to the circuit. At the beginning, $\text{Q1, Q2}$ and $\text{Q3}$ have values $0,1$ and $1,$ respectively. ... $\text{NEVER}$ be obtained with this digital circuit? $(0,0,1)$ $(1,0,0)$ $(1,0,1)$ $(1,1,1)$

Hira Thakur answered in Digital Logic Feb 16

860 views

1 vote

2 answers

12

GATE CSE 2023 | Question: 22
A particular number is written as $132$ in radix-$4$ representation. The same number in radix-$5$ representation is _____________.

akshaw answered in Digital Logic Feb 15

by akshaw

1.1k views

2 votes

3 answers

13

GATE CSE 2023 | Question: 34
A Boolean digital circuit is composed using two $4$-input multiplexers $\text{(M1 and M2)}$ and one $2$-input multiplexer $\text{(M3)}$ as shown in the figure. $\text{X0-X7}$ are the inputs of the multiplexers $\text{M1 and M2}$ and could be connected to either $0$ or $1.$ The select lines of the ... $(1,1,0,0,1,1,0,1)$ $(1,1,0,1,1,1,0,0)$ $(0,0,1,1,0,1,1,1)$

ankitgupta.1729 answered in Digital Logic Feb 15

by ankitgupta.1729

881 views

2 votes

2 answers

14

GATE CSE 2023 | Question: 11
The output of a $2$-input multiplexer is connected back to one of its inputs as shown in the figure. Match the functional equivalence of this circuit to one of the following options. $\text{D}$ Flip-flop $\text{D}$ Latch Half-adder Demultiplexer

ankitgupta.1729 answered in Digital Logic Feb 15

by ankitgupta.1729

1.2k views

2 votes

1 answer

15

GATE CSE 2023 | Memory Based Question: 22
The initial state of a given sequential circuit is $Q_0 Q_1 Q_2=011$. Which of the following state does not occur $101$ $111$ $001$ $100$ closed

Hira Thakur answered in Digital Logic Feb 6

364 views

8 votes

2 answers

16

GATE CSE 2022 | Question: 30
Consider a digital display system $\text{(DDS)}$ shown in the figure that displays the contents of register $\text{X}.$ A $16 - \text{bit}$ code word is used to load a word in $\text{X},$ either from $\text{S}$ or from $\text{R}.$ $\text{S}$ is a $1024-$ ... $1:10$ de-multiplexer$; \quad \; \;\text{Q}$ is $1:5$ de-multiplexer$; \quad \text{T}$ is $2:1$ multiplexer

Abhrajyoti00 answered in Digital Logic Jan 28

by Abhrajyoti00

2.3k views

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0 answers

17

when i make excitation table of any flip flop i saw sometimes we write Q left side of A, B and sometimes right side of A,B what is the meaning of this plz tell me

Gaurav Kumar2002 asked in Digital Logic Jan 27

by Gaurav Kumar2002

83 views

4 votes

3 answers

18

Made easy Gate mock test -1
A Boolean Function must satisfy the condition f(a,b,c) = f(c,b,a). how many such functions are possible?

Yawar Rmir answered in Digital Logic Jan 26

309 views

1 vote

2 answers

19

digital logic
An AB flip flop is constructed from a JK flip flop as shown in the figure. The expression for the next state Qn + 1 is

Yawar Rmir answered in Digital Logic Jan 26

716 views

3 votes

1 answer

20

How many NAND gates required?

Yawar Rmir answered in Digital Logic Jan 26

94 views

0 votes

0 answers

21

Number of boolean fuctions
How many boolean functions are possible that satisfy the condition $f(a,b,c)$ = $f(c,b,a)$? closed

Chaitanya Kale asked in Digital Logic Jan 19

by Chaitanya Kale

108 views

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0 answers

22

ripple counter
In a 4-bit binary ripple counter, for every input clock pulse (a) All the flip-flops get clocked simultaneously. (b) Only one flip-flop get clocked at a time. (c) Two of the flip-flops get clocked at a time. (d) All the above statements are false.

someshawasthi asked in Digital Logic Jan 18

by someshawasthi

72 views

0 votes

0 answers

23

self doubt
if i have given 2 flip flop clock simultaneously and 2 flip flop clock non simultaneously what is it synchronous counter or asynchronous counter ? why?

someshawasthi asked in Digital Logic Jan 18

by someshawasthi

53 views

51 votes

4 answers

24

GATE CSE 2002 | Question: 2-1
Consider the following logic circuit whose inputs are functions $f_1, f_2, f_3$ and output is $f$ Given that $f_1(x,y,z) = \Sigma (0,1,3,5)$ $f_2(x,y,z) = \Sigma (6,7),$ and $f(x,y,z) = \Sigma (1,4,5).$ $f_3$ is $\Sigma (1,4,5)$ $\Sigma (6,7)$ $\Sigma (0,1,3,5)$ None of the above

Mitesh_Sharma answered in Digital Logic Jan 12

by Mitesh_Sharma

10.1k views

3 votes

1 answer

25

Difference between no of states of synchronous vs asynchronous counters
What are the no of states b/w synchronous vs asynchronous counters

h4kr asked in Digital Logic Jan 5

by h4kr

108 views

0 votes

1 answer

26

number system
The decimal equivalent value of given 2's complement number 101001.10 is A -20.5 B -23.5 C -22.5

someshawasthi asked in Digital Logic Jan 4

by someshawasthi

111 views

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0 answers

27

#RPSC LECT.2011
A 2-byte data $d_{15}d_{14}...........d_{2}d_{1}d_{0}$ is transmitted from A to B .here d$_{0}$ represent LSB. if the transmitted value is 1947 and the received value is 1663, bits in error are. .$d_{7}d_{4}d_{3}d_{2}$ $d_{8}d_{5}d_{4}d_{2}$ $d_{7}d_{5}d_{3}d_{2}$ insufficient data to inter correct results.

amit166 asked in Digital Logic Jan 2

42 views

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0 answers

28

A majority function is generated in a combinational circuit when the output is equal to 1 if the input variables have more 1’s than 0’s. The output is 0 otherwise. Make a 3-input majority function.

M.Zain asked in Digital Logic Dec 31, 2022

by M.Zain

241 views

1 vote

0 answers

29

Draw the multilevel NAND circuit for the following expression: w(x + y + z) + xyz.

M.Zain asked in Digital Logic Dec 31, 2022

by M.Zain

64 views

0 votes

0 answers

30

A sequential circuit has two D flip-flops, two inputs x and y, and one output Z is specified by the following next-state and output equations A(t+1) = xy’ + x B B(t+1) = xA +xB’ Z = A (a) Draw the logic diagram of the circuit. (b) List the state table for the sequential circuit. (c) Draw the corresponding state diagram.

M.Zain asked in Digital Logic Dec 30, 2022

by M.Zain

190 views

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0 answers

31

Design a Asynchronous Up counter that start it’s counting from zero and ends at 11 and again starts from zero. Draw the output status of all Flip Flops after every clock. How many clocks are required to reach 11?

M.Zain asked in Digital Logic Dec 30, 2022

by M.Zain

95 views

0 votes

0 answers

32

Make a full adder with two 4 x 1 Multiplexers.

M.Zain asked in Digital Logic Dec 30, 2022

by M.Zain

56 views

2 votes

0 answers

33

Choosing prime implicants in K-maps
I got a K-map with the following boolean function: F(A,B,C,D) = ΠM[3,4,6,9,11,14]+ Σd[0,7,8,10,13,15] In the following K-map following prime-implicants are considered: But I can chose ($\bar{A}$+$\bar{D}$) instead of ($\bar{A}$+$B$) like: So now ... $\bar{C}$+$\bar{D}$)($A$+$C$+$D$) So we get different f in the two cases or am I making a mistake somewhere?

h4kr asked in Digital Logic Dec 28, 2022

by h4kr

100 views

0 votes

1 answer

34

MUX | digital-logic multiplexer | MadeEasy
Ans: 35 Please Explain

abhinowKatore asked in Digital Logic Dec 23, 2022

by abhinowKatore

210 views

1 vote

0 answers

35

DRDO CSE 2022 Paper 1 | Question: 6 (b)
Let $\oplus$ sign denote bitwise addition modulo $2$. Let $n$ and $m$ be integers. Consider the set of $m$ equations on $n$ variables as follows. \[\begin{array}{l} a_{1,1} x_{1} \oplus a_{1,2} x_{2} \oplus \ldots \oplus ... $\{0,1\}$. What is the expected number of equations that can be satisfied if $x_i$'s are picked uniformly and independently at random.

admin asked in Digital Logic Dec 15, 2022

by admin

77 views

2 votes

0 answers

36

DRDO CSE 2022 Paper 1 | Question: 6 (a)
Let $\oplus$ sign denote bitwise addition modulo $2$. Let $n$ and $m$ be integers. Consider the set of $m$ equations on $n$ variables as follows. \[\begin{array}{l} a_{1,1} x_{1} \oplus a_{1,2} x_{2} \oplus \ldots \oplus a_{1, n} x_{n}=b_{1 ... $a_{1, n} x_{n}=b_{1}$ if all $x_{i}$'s are picked uniformly and independently at random from $\{0,1\}$.

admin asked in Digital Logic Dec 15, 2022

by admin

109 views

1 vote

0 answers

37

DRDO CSE 2022 Paper 1 | Question: 21
For decimal number $-30$, the $16$-bit $2$'s complement representation is _________

admin asked in Digital Logic Dec 15, 2022

by admin

64 views

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