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Recent questions tagged circuit-output

0 votes
1 answer
1
Starting from a state of the state table given below find out the output sequence generated with an input sequence 01110010011. reduce the same table and repeat the same sequence with the given input sequence. Show that same output is obtained.
asked Apr 4, 2019 in Digital Logic ajaysoni1924 284 views
1 vote
0 answers
3
0 votes
1 answer
7
Assume the operands are in 2’s Complement. To decrement A by 1, lines K,Cn and B should be : K = 1 , Cin = 1 , B = 1 K = 0 , Cin = 1 , B = 1 K = 0 , Cin = 1 , B = 0 K = 1 , Cin = 0 , B = 0
asked Jan 16, 2019 in Digital Logic Na462 468 views
0 votes
1 answer
10
Assume the initial values of $K0$, $Q_0$ and $Q_1$ to be $1$. Which of the following state transition tables correctly correspond to the circuit given above? (Note: $Q_{kN}$ and $Q_{kN+1}$ ...
asked Dec 27, 2018 in Digital Logic Ruturaj Mohanty 175 views
0 votes
2 answers
13
9 votes
3 answers
14
In the diagram above, the inverter (NOT gate) and the AND-gates labeled $1$ and $2$ have delays of $9$, 10 and $12$ nanoseconds (ns), respectively. Wire delays are negligible. For certain values $a$ and $c$, together with certain transition of $b$, a glitch (spurious output) is ... , after which the output assumes its correct value. The duration of glitch is: $7$ $ns$ $9$ $ns$ $11$ $ns$ $13$ $ns$
asked Apr 22, 2018 in Digital Logic Arjun 2.8k views
4 votes
1 answer
15
Consider the synchronous sequential circuit in the below figure Given that the initial state of the circuit is S$_4$, identify the set of states, which are not reachable.
asked Feb 10, 2018 in Digital Logic jothee 851 views
0 votes
1 answer
20
3 votes
0 answers
23
For the circuit shown below: For how many number of clock pulses for which $y_2$ is '1' ? $ \text{A. 2 clock pulses} $ $ \text{B. 3 clock pulses} $ $ \text{C. 10 clock pulses} $ $ \text{D. 6 clock pulses} $
asked Jan 3, 2017 in Digital Logic Sachin Mittal 1 224 views
4 votes
3 answers
24
In the circuit shown below, the propagation delay of each NOT gate is 2 nsec (2 nano sec), then the time period of generated square wave is – Please somebody explain the approach for this type of qestions
asked Dec 26, 2016 in Digital Logic Pankaj Joshi 430 views
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