Recent questions tagged adder

5 5 votes
1 1 answer
181
181 views
Two unsigned $2$-bit numbers $A_1A_0$ and $B_1B_0$ are added with no input carry. Which implementation and equations are correct?LSB uses half adder: $S_0=A_0\oplus B_0$,...
4 4 votes
1 1 answer
166
166 views
For a full adder with inputs $A$, $B$, and $C_{in}$, for which input combinations are $S=0$ and $C_{out}=1$?$000,111$ $011,101,110$ $001,010,100$ $011,101,111$
4 4 votes
1 1 answer
153
153 views
A full adder is implemented using two half adders and one OR gate. The first half adder takes inputs $A$ and $B$. The second half adder takes the first sum output and $C_...
1 1 vote
1 1 answer
190
190 views
What is the advantage of using a full adder over a half adder in binary addition?A full adder does not require a carry-in input.A full adder can add two $4$-bit numbers.A...
5 5 votes
3 3 answers
606
606 views
Which of the following circuits come under the class of combinational logic circuits?Full adderFull subtracterHalf adderJ-K flipCounterSelect the correct answer from the ...
2 2 votes
1 1 answer
418
418 views
0 0 votes
2 2 answers
737
737 views
The number of full and half-adders required to add $32$-bit numbers is______________________
0 0 votes
1 1 answer
798
798 views
How to calculate the third option?
1 1 vote
0 0 answers
554
554 views
Given a truth table of the full adder for three inputs. Draw a full adder circuit with a decoder and two $\text{OR}$ gates.$$\begin{array}{|c|c|c|c|c|}\hline \mathrm{X} &...
1 1 vote
3 3 answers
1.5k
1.5k views
A 4-bit carry lookahead adder adds two 4-bit numbers. The adder is designed without making use of the EX-OR gates. The propagation delay for all gates is given as 2.4 tim...
3 3 votes
2 2 answers
803
803 views
If $A$ and $B$ are the inputs to a half adder, a half subtractor. $X$ and $Y$ are the Sum and Difference and $\mathrm{C}$ is a Carry of a Half adder and $D$ is a borrow o...
0 0 votes
1 1 answer
508
508 views
The number of full and half-adders required to add $16$-bit numbers is :$8$ half-adders, $8$ full-adders$1$ half-adders, $15$ full-adders$16$ half-adders, $0$ full-adders...
3 3 votes
3 3 answers
4.9k
4.9k views
In which of the following adder circuits, the carry look ripple delay is eliminated?Half adderFull adderParallel adderCarry-look ahead adder
3 3 votes
3 3 answers
1.6k
1.6k views
How many inputs are required in Full Adder Circuit?$2$$3$More than two inputsNone of the above
0 0 votes
1 1 answer
1.8k
1.8k views
A half-adder is also known as :$\text{AND}$ Circuit$\text{NAND}$ Circuit$\text{NOR}$ Circuit$\text{EX-OR}$ Circuit
10 10 votes
2 2 answers
6.8k
6.8k views
In a $8$-bit ripple carry adder using identical full adders, each full adder takes $34$ ns for computing sum. If the time taken for $8$-bit addition is $90$ ns, find time...
1 1 vote
0 0 answers
1.2k
1.2k views
It is necessary to design a decimal Adder for two digits represented in Excess-3 code. Show that the correction after adding the two digits with a four-bit binary adder i...
0 0 votes
0 0 answers
627
627 views
Construct a 4-digit BCD adder-subtractor using 4 BCD adders. Use the Block diagram for each component, showing only inputs and outputs.
0 0 votes
1 1 answer
1.2k
1.2k views
How many Unused Combinations are there in BCD adder?
0 0 votes
0 0 answers
816
816 views
Derive the two-level Boolean expression for the output carry $C _5$ shown in the look-ahead carry generator of the figure
1 1 vote
3 3 answers
7.2k
7.2k views
Assume that the EXCLUSIVE-OR gate has a propagation delay of 20ns and that the AND and OR gates have a Propagation delay of 10ns. What is the total Propagation delay time...
0 0 votes
0 0 answers
1.3k
1.3k views
(a) Redefine the carry propagate and carry generate as follows:$P _i = A _i + B _ i$$G _i = A _iB _i$Show that the output carry and output sum of a full adder becomes$C _...