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Recent questions tagged adder
0
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answers
1
Nielit STA 2018
Minimum number of Full adders and half adders required by the BCD adder to add two decimal digits.
asked
Dec 5, 2018
in
Digital Logic
by
Robert Soram
(
41
points)

43
views
digitallogic
adder
0
votes
1
answer
2
Full adder
asked
Nov 15, 2018
in
Digital Logic
by
Na462
Loyal
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8.7k
points)

61
views
digitallogic
carrygenerator
adder
fulladder
0
votes
0
answers
3
MadeEasy Workbook: Digital Logic  Adder
x and y are two n bit numbers. these numbers are added by n bit carry look ahead adder which uses k logic levels. if the average gate delay of carry look ahead adder is d then what will be the maximum Delay of carry look ahead adder circuit? N2 Kd Nkd Nd
asked
Nov 12, 2018
in
Digital Logic
by
shgarg
(
31
points)

31
views
digitallogic
adder
madeeasytestseries
0
votes
0
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4
Self Doubt
Suppose we are using 4bit carry lookahead adder modules to build a 64 bit adder with twolevel carry lookahead, with ripple carry between the modules. If the delay of a basic gate (AND, OR, NOT) is 2 nanoseconds, the worstcase delay of the 64bit adder will be ……….. nanoseconds.
asked
Nov 7, 2018
in
Digital Logic
by
jatin khachane 1
Loyal
(
6.4k
points)

73
views
digitallogic
adder
0
votes
2
answers
5
Gateforum Test Series: Digital Logic  Adder
asked
Nov 6, 2018
in
Digital Logic
by
Gupta731
Active
(
4.5k
points)

47
views
gateforumtestseries
digitallogic
adder
0
votes
1
answer
6
Full adder
asked
Oct 1, 2018
in
Digital Logic
by
Na462
Loyal
(
8.7k
points)

90
views
digitallogic
adder
carrygenerator
+1
vote
1
answer
7
Sums on Adder
$1)$3bit ripple adder, which adds two 3bit numbers, is designed using AND, OR, NOT, NAND, NOR gates only. Assuming that all the inputs are available in both complemented and uncomplemented forms and the delay of each gate is one time unit, ... both complemented and uncomplemented forms and the delay of each gate is one time unit, what is the overall propagation delay of the adder?
asked
Aug 30, 2018
in
Digital Logic
by
srestha
Veteran
(
109k
points)

187
views
digitallogic
adder
0
votes
1
answer
8
Adder delay
A full adder circuit takes 20 ns to generate the carryout bit and 40 ns for the sum bit. When 4, 1 bit full adders are cascaded, the maximum rate of additions per second will be $\text{____} \times 10^6 $sec. Usual Solution given The ... calculate the total time taken to perform one round of four bit addition. Right? (Similar old question: https://gateoverflow.in/83500/digitals)
asked
Aug 19, 2018
in
Digital Logic
by
GateAspirant999
Active
(
2.8k
points)

169
views
digitallogic
adder
combinational
digitalcircuits
0
votes
0
answers
9
Doubt
How to check whether there is overflow in nbit parallel adder?
asked
Aug 3, 2018
in
Digital Logic
by
aditi19
Active
(
2.4k
points)

42
views
adder
0
votes
0
answers
10
doubt
How to Calculate Propagation Delay In Carry Look Ahead Adder.
asked
Jul 18, 2018
in
Digital Logic
by
bhavnakumrawat5
(
203
points)

40
views
carry
look
ahead
adder
0
votes
1
answer
11
gate 2004
A $4 \hspace{0.1cm} bit$ carry lookahead adder which add two $4$ $bit$ number is designed using $AND ,OR,NOT,NAND,NOR$ gates only.Assuming that all the inputs are available in both complemented and uncomplemented form and the delay of each gate is one time ... is if we take same $4$ $bit$ number instead of lookahead adder if we take parallel adder what will be overall propagation delay??
asked
May 27, 2018
in
Digital Logic
by
BASANT KUMAR
Active
(
2.4k
points)

111
views
digitallogic
adder
0
votes
1
answer
12
Adder
One ripple carry adder is adding two nbit integers. The time complexity to perform addition using this adder is (We know carry look ahead adder takes time log n. Is it similar for other adders too). Plz also share some good resource about these two adders
asked
May 21, 2018
in
Digital Logic
by
srestha
Veteran
(
109k
points)

82
views
digitallogic
carrygenerator
adder
+2
votes
0
answers
13
Digital Logic
Please elaborate your answer.
asked
Jan 9, 2018
in
Digital Logic
by
gauravkc
Loyal
(
7.6k
points)

65
views
digitallogic
adder
+1
vote
0
answers
14
CLA and RCA delays.
How to analyse the delays of Ripple carry adder and Carry look ahead adder. Please explain with Example.
asked
Dec 30, 2017
in
Digital Logic
by
AnilGoudar
Active
(
4.7k
points)

107
views
digitallogic
carrygenerator
adder
0
votes
1
answer
15
MadeEasy Test Series: Digital Logic  Adder
A 1bit full adder circuit takes 5 ns to generate the carryout bit and 10 ns for the sumbit. When 4, 1bit full adders are cascaded, the maximum rate of additions per second will be _______ × 107.
asked
Dec 4, 2017
in
Digital Logic
by
shivangi5
Active
(
1.4k
points)

62
views
madeeasytestseries
digitallogic
adder
0
votes
1
answer
16
MadeEasy Test Series: Digital Logic  Adder
asked
Dec 3, 2017
in
Digital Logic
by
Jaspreet Kaur Bains
Junior
(
769
points)

85
views
madeeasytestseries
digitallogic
adder
multiplexer
+3
votes
0
answers
17
Modified GATE 2003 question
Consider this GATE 2003 question: https://gateoverflow.in/937/gate200346 Here, instead of XOR gates we had OR gates, then which of the following operations can we perform? $A + B, A  B\ and\ A + 1$
asked
Nov 3, 2017
in
CO & Architecture
by
Rishabh Gupta 2
Boss
(
16.3k
points)

183
views
gate2003
adder
0
votes
1
answer
18
MadeEasy WorkBook: Digital Logic  Adder
asked
Oct 27, 2017
in
Digital Logic
by
charul
Active
(
1.3k
points)

140
views
digitallogic
adder
madeeasybooklet
+2
votes
0
answers
19
GATE2003
asked
Oct 22, 2017
in
Digital Logic
by
chetan raghav
(
107
points)

75
views
full
adder
+2
votes
1
answer
20
Digital Systems  Help building a 4 bit Binary adder circuit
asked
Oct 2, 2017
in
Digital Logic
by
Garrett McClure
(
443
points)

348
views
digitallogic
digitalcircuits
adder
halfadder
+1
vote
0
answers
21
made easy book
If the carry propogation delay is 5 in full adder then multiplication of 8 bit number using comultiplier takes(Assume AND gate delay=2)
asked
Sep 17, 2017
in
Digital Logic
by
nikkey123
Active
(
1.5k
points)

78
views
digitallogic
adder
+1
vote
2
answers
22
Which expression is right with respect to carry look header?
(i) Ci +1= Gi+ PiCi (ii) Ci +1= G(i+1) + P(i+1)Ci https://www.youtube.com/watch?v=9lyqSVKbyz8&index=116&list=PLBlnK6fEyqRjMH3mWf6kwqiTbT798eAOm i or ii ?
asked
Sep 7, 2017
in
Digital Logic
by
hem chandra joshi
Active
(
4.7k
points)

114
views
adder
carrygenerator
0
votes
1
answer
23
adder
This is binary to radix 12 circuit, how?
asked
Aug 31, 2017
in
Digital Logic
by
Sunil8860
(
161
points)

171
views
digitallogic
adder
+5
votes
4
answers
24
ISRO201724
When two $n$bit binary numbers are added the sum will contain at the most $n$ bits $n + 2$ bits $n + 3$ bits $n + 1$ bits
asked
May 7, 2017
in
Digital Logic
by
sh!va
Boss
(
35.2k
points)

3.4k
views
isro2017
digitallogic
adder
0
votes
1
answer
25
ISRO 2007ECE Half Adder Circuit
A half adder can be constructed using two 2input logic gates. One of them is an ANDgate, the other is a) OR b) NAND c) NOR d) EXOR
asked
Mar 2, 2017
in
Digital Logic
by
sh!va
Boss
(
35.2k
points)

156
views
isroece
digitallogic
adder
+1
vote
1
answer
26
Adder
asked
Jan 4, 2017
in
Digital Logic
by
vaishali jhalani
Loyal
(
6k
points)

348
views
digitallogic
adder
0
votes
1
answer
27
Digital: Carry Look Ahead Adder
Que: For Standard 4 bit [Where LSB bit consider at 0th & MSB Consider at 3rd position] carry look ahead adder, what is then fanin of OR gate whose output is C3____? Given Answer: 5 My answer: 4 C3=P2P1P0C0 + P2P1G0 + P2G1 + G2 as Ci+1= PiCi + Gi Please check!
asked
Dec 24, 2016
in
Digital Logic
by
Vijay Thakur
Boss
(
17.3k
points)

296
views
digitallogic
adder
combinational
0
votes
0
answers
28
GATE19884ii
Using binary full adders and other logic gates (if necessary), design an adder for adding 4bit number (including sign) in 2’s complement notation.
asked
Dec 19, 2016
in
Digital Logic
by
jothee
Veteran
(
115k
points)

139
views
gate1988
digitallogic
descriptive
adder
0
votes
0
answers
29
full adder
Can anyone explain me this theory with an example(from the third line)...??
asked
Dec 14, 2016
in
Digital Logic
by
Anmol Verma
Active
(
1.6k
points)

81
views
digitallogic
adder
combinational
0
votes
1
answer
30
virtual gate
Which of the following statements is/are true? S1: Carry lookahead adder is faster compared to a ripple carry adder. S2: The cost is higher for a carry lookahead adder compared to a ripple carry adder. (A) S1 only (B) S2 only (C) Both (D) None of these
asked
Dec 8, 2016
in
Digital Logic
by
Tendua
Boss
(
16.1k
points)

179
views
virtualgate
digitallogic
adder
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