cache

Question

Suppose that in 500 memory references there are 100 misses in first level and 50 miss in second level cache. Assume that miss penalty from L₂ cache to memory is 100 cycles. The hit time of L₂ cache is 20 cycles. If there are 2 memory references per instruction, the average stall per instruction is _________.

Answer 1

Stalls for instruction always happen when we misses in primary cache

$\therefore for \ 2 \ memory \  reference \ 2 * \frac{1}{5}=0.4 \ misses\ in \ L1 \ cache.$

Similarly for L2 $= 0.2 \ misses$

Now calculate Avg stalls which is $0.4*20+0.2*100=28 \  cycle \ stalls.$