Let the page size be $x$.

Since virtual address is $46$ bits, we have total number of pages $ = \frac{2^{46}}{x}$

We should have an entry for each page in last level page table which here is $T3$. So,

Number of entries in $T3$ (sum of entries across all possible $T3$ tables) $ = \frac{2^{46}}{x}$

Each entry takes $32$ bits $= 4$ bytes. So, total size of $T3$ tables $= \frac{2^{46}}{x} \times 4 = \frac{2^{48}}{x}$ bytes

Now, no. of $T3$ tables will be Total size of $T3$ tables/page table size and for each of these page tables, we must have a $T2$ entry. Taking $T3$ size as page size, no. of entries across all $T2$ tables

$= \frac{\frac{2^{48}}{x}}{x} = \frac{2^{48}}{x^2} $

Now, no. of T2 tables (assuming T2 size as pagesize) = $\frac{2^{48}}{x^2} \times 4$ bytes = $\frac{\frac{2^{50}}{x^2}} {x} = \frac{2^{50}}{x^3}$.

Now, for each of these page table, we must have an entry in $T1$. So, number of entries in $T1$

$=\frac{2^{50}}{x^3}$

And size of $T1$ $=\frac{2^{50}}{x^3} \times 4 =\frac{2^{52}}{x^3} $

Given in question, size of $T1$ is page size which we took as $x$. So,

$x = \frac{2^{52}}{x^3}$

$\implies x^4 =2^{52}$

$\implies x = 2^{13} = 8KB$

Min. no. of page color bits $=$ No. of set index bits $+$ no. of offset bits $-$ no. of page index bits (This ensures no synonym maps to different sets in the cache)

We have $1$MB cache and $64$B cache block size. So,

number of sets $= 1$MB$/(64$ B $\times$ Number of blocks in each set$) = 16K/16 (16$ way set associative) $= 1K = 2^{10}.$

So, we need $10$ index bits. Now, each block being $64 (2^6)$ bytes means we need 6 offset bits.

And we already found page size $= 8KB = 2^{13}$, so $13$ bits to index a page

Thus, no. of page color bits $= 10 + 6 - 13 = 3. $

With 3 page color bits we need to have $2^3 = 8$ different page colors

**More Explanation: **

A synonym is a physical page having multiple virtual addresses referring to it. So, what we want is no two synonym virtual addresses to map to two different sets, which would mean a physical page could be in two different cache sets. This problem never occurs in a physically indexed cache as indexing happens via physical address bits and so one physical page can never go to two different sets in cache. In virtually indexed cache, we can avoid this problem by ensuring that the bits used for locating a cache block (index+offset) of the virtual and physical addresses are the same.

In our case we have $6$ offset bits $+ 10$ bits for indexing. So, we want to make these $16$ bits same for both physical and virtual address. One thing is that the page offset bits $- 13$ bits for $8$ KB page, is always the same for physical and virtual addresses as they are never translated. So, we don't need to make these $13$ bits same. We have to only make the remaining $10 + 6 - 13 = 3$ bits same. Page coloring is a way to do this. Here, all the physical pages are colored and a physical page of one color is mapped to a virtual address by OS in such a way that a set in cache always gets pages of the same color. So, in order to make the $3$ bits same, we take all combinations of it $(2^3 = 8)$ and colors the physical pages with $8$ colors and a cache set always gets a page of one color only. (In page coloring, it is the job of OS to ensure that the $3$ bits are the same).

http://ece.umd.edu/courses/enee646.F2007/Cekleov1.pdf

Correct Answer: $C$