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IIT Bombay | MS/PhD Admission Test Dec. 2024 | Question-12


Consider a system with $32$ -bit addresses, $4$ KB pages, and $4$ -byte page table entries, using a two-level page table. A process in this system has the following layout in its virtual address space. The first $8$ MB of the virtual address space contains compile-time code and data. The next $1$ MB is the heap. Next, there is an unused (invalid) gap of $30$ MB , followed by a user stack of $1$ MB . Starting at virtual address $3$ GB , the next $20$ MB of the virtual address space is mapped to kernel code and data. The rest of the virtual address space is unused. The inner page table pages of the process are allocated on demand, that is, when they contain at least one valid page table entry. The outer page table is always allocated.

  1. How many inner page table pages are required to store the page table mappings for the 8 MB of compile-time code and data of the process?
  2. How many inner page table pages are required to store all the page table entries corresponding to userspace code and data (compile-time code and data, stack, heap) of the process?
  3. Consider the inner page table page containing the page table entries for the user stack. How many page table entries in this page are invalid?
  4. How many inner page table pages are required to hold the page table mappings for the kernel code and data?
  5. How many valid entries does the outermost level of the page table have?

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