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GO Classes DPP | OS | PAGING

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A system uses a $\mathbf{2-}$level hierarchical page table for a $32-$bit virtual address space. The page size is $\mathbf{4 ~KB}$. Each Page Table Entry (PTE) at both levels is $\mathbf{4~bytes}$. The system uses a Translation Lookahead Buffer (TLB) with a hit ratio of $\mathbf{9 5 \%}$.

A process is currently executing a loop where it accesses a specific data array. Due to a unique hardware constraint, the first-level page table (Page Directory) is not cacheable in the TLBonly the second-level PTEs are cached.

If a TLB hit takes $\mathbf{2 ~ n s}$ and a single main memory access takes $\mathbf{100 ~ns}$, what is the Effective Memory Access Time (EMAT) in nanoseconds for a memory reference? (Assume the secondlevel page table is always in memory and ignore page faults).

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TLB Hit $(95\%):$ Even on a TLB hit, the hardware constraint says we only cached the $2$nd-level entry. We still have to access the Page Directory in memory.

  • Time $=T L B_{\text {search }}+ Mem _{\text {PageDirectory }}+ Mem _{\text {ActualData }}$
     
  • Time $=2+100+100=202 \mathrm{~ns}$
     

TLB Miss $(5\%):$ Must access Page Directory, then Page Table, then Data.

  • Time $=T L B_{\text {search }}+ Mem _{\text {PageDirectory }}+ Mem _{\text {PageTable }}+ Mem _{\text {ActualData }}$
     
  • Time $=2+100+100+100=302 \mathrm{~ns}$
     

EMAT: $(0.95 \times 202)+(0.05 \times 302)=191.9+15.1=207 \mathrm{~ns}$.

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