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DLDA Q

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Consider the following diagram of a 4-bit counter and also a function table for the counter.
image:q59.PNG
Assume that the counter and gate delays are negligible. If the counter starts at 0, then it goes through the following sequence.

following sequence.

  1.   0, 1, 2, 3, 4, 5
  2.  0, 1, 2, 3, 4
  3.   0, 1, 2, …, 10
  4.   0, 1, 2, …, 9

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